參數(shù)資料
型號(hào): EDI88512LPA20MMG
廠商: MICROSEMI CORP-PMG MICROELECTRONICS
元件分類: SRAM
英文描述: 512K X 8 STANDARD SRAM, 20 ns, PDSO36
封裝: ROHS COMPLIANT, PLASTIC, SOJ-36
文件頁(yè)數(shù): 3/9頁(yè)
文件大?。?/td> 798K
代理商: EDI88512LPA20MMG
February 2011
2011 Microsemi Corporation. All rights reserved.
3
Microsemi Corporation (602) 437-1520 www.whiteedc.com
Rev. 10
www.microsemi.com
Microsemi Corporation reserves the right to change products or specications without notice.
EDI88512CA-XMXG
WPS512K8X-XRJXG
AC CHARACTERISTICS – READ CYCLE
VCC = 5.0V, VSS = 0V, 0°C ≤ TA ≤ +70°C
Parameter
Symbol
17ns
20ns
25ns
Units
JEDEC
Alt.
Min
Max
Min
Max
Min
Max
Read Cycle Time
tAVAV
tRC
17
20
25
ns
Address Access Time
tAVQV
tAA
17
20
25
ns
Chip Enable Access Time
tELQV
tACS
17
20
25
ns
Chip Enable to Output in Low Z (1)
tELQX
tCLZ
333
ns
Chip Disable to Output in High Z (1)
tEHQZ
tCHZ
07080
10
ns
Output Hold from Address Change
tAVQX
tOH
000
ns
Output Enable to Output Valid
tGLQV
tOE
810
12
ns
Output Enable to Output in Low Z (1)
tGLQX
tOLZ
000
ns
Output Disable to Output in High Z(1)
tGHQZ
tOHZ
07080
10
ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS – WRITE CYCLE
VCC = 5.0V, VSS = 0V, 0°C ≤ TA ≤ +70°C
Parameter
Symbol
17ns
20ns
25ns
Units
JEDEC
Alt.
Min
Max
Min
Max
Min
Max
Write Cycle Time
tAVAV
tWC
17
20
25
ns
Chip Enable to End of Write
tELWH
tELEH
tCW
14
15
17
ns
Address Setup Time
tAVWL
tAVEL
tAS
0
ns
Address Valid to End of Write
tAVWH
tAVEH
tAW
14
15
17
ns
Write Pulse Width
tWLWH
tWLEH
tWP
14
15
17
ns
Write Recovery Time
tWHAX
tEHAX
tWR
0
ns
Data Hold Time
tWHDX
tEHDX
tDH
0
ns
Write to Output in High Z (1)
tWLQZ
tWHZ
08080
10
ns
Data to Write Time
tDVWH
tDVEH
tDW
8
10
12
ns
Output Active from End of Write (1)
tWHQX
tWLZ
000
ns
1. This parameter is guaranteed by design but not tested.
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