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參數(shù)資料
| 型號： | EDI8F321024C35MZC |
| 英文描述： | Dual Push-Pull Laser Driver Oscillator; Temperature Range: 0°C to 70°C; Package: 6-SOT-23 T&R |
| 中文描述： | X32號的SRAM模塊 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 234K |
| 代理商： | EDI8F321024C35MZC |
1
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
EDI8F321024C
June 2001 Rev. 8
ECO #14320
FEATURES
PIN CONFIGURATIONS AND BLOCK DIAGRAM
1024Kx32 bit CMOS Static RAM
Access Times: 15, 20, and 25ns
Individual Byte Selects
Fully Static, No Clocks
TTL Compatible I/O
High Density Package
72 Pin ZIP, No. 175
72 lead SIMM, No. 176 (Angle)
72 lead SIMM, No. 356 (Straight)
Common Data Inputs and Outputs
Single +5V (±10%) Supply Operation
The EDI8F321024C is a high speed 32 megabit Static RAM
module organized as 1024K words by 32 bits. This module is
constructed from eight 1024Kx4 Static RAMs in SOJ packages
on an epoxy laminate (FR4) board.
Four chip enables (E-E3) are used to independently enable
the four bytes. Reading or writing can be executed on individual
bytes or any combination of multiple bytes through proper use of
selects.
The EDI8F321024C is offered in 72 pin ZIP and 72 lead SIMM
packages, which enable 32 megabits of memory to be placed in
less than 1.3 square inches of board space.
All inputs and outputs are TTL compatible and operate from a
single 5V supply. Fully asynchronous circuitry requires no
clocks or refreshing for operation and provides equal access and
cycle times for ease of use.
Pins PD1- PD4, are used to identify module memory density in
applications where alternate modules can be interchanged.
PIN NAMES
1024Kx32 Static RAM CMOS, High Speed Module
A-A19
Address Inputs
E-E3
Chip Enables
W
Write Enable
G
Output Enable
DQ-DQ31
Common Data
Input/Output
VCC
Power (+5V±10%)
VSS
Ground
NC
No Connection
FIG. 1
DESCRIPTION
8F321024C Pin Config.
0
E
1
E
2
E
3
E
8F321024C Blk Dia.
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