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參數(shù)資料
| 型號(hào)： | EDI8G321024C15MMC |
| 英文描述： | Monolithic 1A Step-Down Regulator; Temperature Range: -40°C to 85°C; Package: 10-MSOP T&R |
| 中文描述： | X32號(hào)的SRAM模塊 |
| 文件頁(yè)數(shù)： | 3/6頁(yè) |
| 文件大小： | 234K |
| 代理商： | EDI8G321024C15MMC |
3
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
EDI8F321024C
June 2001 Rev. 8
ECO #14320
AC CHARACTERISTICS READ CYCLE
READ CYCLE 2 - W HIGH
Note 1: Parameter guaranteed, but not tested.
READ CYCLE 1 - W HIGH, G, E LOW
FIG. 2
FIG. 3
ADDRESS 1
ADDRESS 2
TAVAV
DATA 1
DATA 2
TAVQV
TAVQX
8F321024C Rd Cyc1
A
Q
TGHQZ
TELQV
TELQX
E
G
Q
TEHQZ
A
TAVAV
TGLQV
TGLQX
TAVQV
8F321024C Rd Cyc2
Symbol
15ns
20ns
25ns
Parameter
JEDEC Alt.
Min
Max
Min Max Min Max
Units
Read Cycle Time
TAVAV TRC
15
20
25
ns
Address Access Time
TAVQV TAA
15
20
25
ns
Chip EnableAccess
TELQV TACS
15
20
25
ns
Chip Enable to Output in Low Z (1)
TELQX TCLZ
3
ns
Chip Disable to Output in High Z (1)
TEHQZ TCHZ
7
10
12
ns
Output Hold fromAddress Change
TAVQX TOH
3
ns
Output Enable to Output Valid
TGLQV TOE
7
8
10
ns
Output Enable to Output in Low Z (1)
TGLQX TOLZ
0
ns
Output Disable to Output in High Z(1)
TGHQZ TOHZ
7
8
10
ns
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