參數(shù)資料
型號(hào): EFM32G840F32
廠商: Energy Micro
文件頁(yè)數(shù): 48/69頁(yè)
文件大?。?/td> 0K
描述: MCU 32BIT 32KB FLASH 64-QFN
標(biāo)準(zhǔn)包裝: 1,000
系列: Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: EBI/EMI,I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,LCD,POR,PWM,WDT
輸入/輸出數(shù): 56
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤(pán)
包裝: 帶卷 (TR)
其它名稱(chēng): EFM32G840F32-QFN64
...the world's most energy friendly microcontrollers
2013-06-28 - EFM32G840FXX - d0008_Rev1.60
52
www.energymicro.com
Alternate
LOCATION
Functionality
0
1
2
3
Description
An external LCD voltage may also be applied to this pin if the booster is not
enabled.
If AVDD is used directly as the LCD supply voltage, this pin may be left un-
connected or used as a GPIO.
LCD_COM0
PE4
LCD driver common line number 0.
LCD_COM1
PE5
LCD driver common line number 1.
LCD_COM2
PE6
LCD driver common line number 2.
LCD_COM3
PE7
LCD driver common line number 3.
LCD_SEG0
PF2
LCD segment line 0. Segments 0, 1, 2 and 3 are controlled by SEGEN0.
LCD_SEG1
PF3
LCD segment line 1. Segments 0, 1, 2 and 3 are controlled by SEGEN0.
LCD_SEG2
PF4
LCD segment line 2. Segments 0, 1, 2 and 3 are controlled by SEGEN0.
LCD_SEG3
PF5
LCD segment line 3. Segments 0, 1, 2 and 3 are controlled by SEGEN0.
LCD_SEG4
PE8
LCD segment line 4. Segments 4, 5, 6 and 7 are controlled by SEGEN1.
LCD_SEG5
PE9
LCD segment line 5. Segments 4, 5, 6 and 7 are controlled by SEGEN1.
LCD_SEG6
PE10
LCD segment line 6. Segments 4, 5, 6 and 7 are controlled by SEGEN1.
LCD_SEG7
PE11
LCD segment line 7. Segments 4, 5, 6 and 7 are controlled by SEGEN1.
LCD_SEG8
PE12
LCD segment line 8. Segments 8, 9, 10 and 11 are controlled by SEGEN2.
LCD_SEG9
PE13
LCD segment line 9. Segments 8, 9, 10 and 11 are controlled by SEGEN2.
LCD_SEG10
PE14
LCD segment line 10. Segments 8, 9, 10 and 11 are controlled by SEGEN2.
LCD_SEG11
PE15
LCD segment line 11. Segments 8, 9, 10 and 11 are controlled by SEGEN2.
LCD_SEG12
PA15
LCD segment line 12. Segments 12, 13, 14 and 15 are controlled by
SEGEN3.
LCD_SEG13
PA0
LCD segment line 13. Segments 12, 13, 14 and 15 are controlled by
SEGEN3.
LCD_SEG14
PA1
LCD segment line 14. Segments 12, 13, 14 and 15 are controlled by
SEGEN3.
LCD_SEG15
PA2
LCD segment line 15. Segments 12, 13, 14 and 15 are controlled by
SEGEN3.
LCD_SEG16
PA3
LCD segment line 16. Segments 16, 17, 18 and 19 are controlled by
SEGEN4.
LCD_SEG17
PA4
LCD segment line 17. Segments 16, 17, 18 and 19 are controlled by
SEGEN4.
LCD_SEG18
PA5
LCD segment line 18. Segments 16, 17, 18 and 19 are controlled by
SEGEN4.
LCD_SEG19
PA6
LCD segment line 19. Segments 16, 17, 18 and 19 are controlled by
SEGEN4.
LCD_SEG20
PB3
LCD segment line 20. Segments 20, 21, 22 and 23 are controlled by
SEGEN5.
LCD_SEG21
PB4
LCD segment line 21. Segments 20, 21, 22 and 23 are controlled by
SEGEN5.
LCD_SEG22
PB5
LCD segment line 22. Segments 20, 21, 22 and 23 are controlled by
SEGEN5.
LCD_SEG23
PB6
LCD segment line 23. Segments 20, 21, 22 and 23 are controlled by
SEGEN5.
LETIM0_OUT0
PD6
PB11
PF0
PC4
Low Energy Timer LETIM0, output channel 0.
LETIM0_OUT1
PD7
PB12
PF1
PC5
Low Energy Timer LETIM0, output channel 1.
LEU0_RX
PD5
PB14
PE15
LEUART0 Receive input.
LEU0_TX
PD4
PB13
PE14
LEUART0 Transmit output. Also used as receive input in half duplex commu-
nication.
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