參數(shù)資料
型號(hào): EFM32LG230F128
廠商: Energy Micro
文件頁(yè)數(shù): 47/65頁(yè)
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB FLASH QFN64
標(biāo)準(zhǔn)包裝: 1,000
系列: Leopard Gecko
核心處理器: ARM? Cortex?-M4
芯體尺寸: 32-位
速度: 48MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 56
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.85 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 帶卷 (TR)
Preliminary
...the world's most energy friendly microcontrollers
2013-06-28 - EFM32LG230FXX - d0105_Rev1.10
51
www.energymicro.com
Alternate
LOCATION
Functionality
0
1
2
3
4
5
6
Description
USART0 Synchronous mode Master Input / Slave Output
(MISO).
US0_TX
PE10
PC11
PE13
PB7
PC0
USART0 Asynchronous Transmit.Also used as receive input
in half duplex communication.
USART0 Synchronous mode Master Output / Slave Input
(MOSI).
US1_CLK
PB7
PD2
PF0
USART1 clock input / output.
US1_CS
PB8
PD3
PF1
USART1 chip select input / output.
US1_RX
PC1
PD1
PD6
USART1 Asynchronous Receive.
USART1 Synchronous mode Master Input / Slave Output
(MISO).
US1_TX
PC0
PD0
PD7
USART1 Asynchronous Transmit.Also used as receive input
in half duplex communication.
USART1 Synchronous mode Master Output / Slave Input
(MOSI).
US2_CLK
PC4
USART2 clock input / output.
US2_CS
PC5
USART2 chip select input / output.
US2_RX
PC3
USART2 Asynchronous Receive.
USART2 Synchronous mode Master Input / Slave Output
(MISO).
US2_TX
PC2
USART2 Asynchronous Transmit.Also used as receive input
in half duplex communication.
USART2 Synchronous mode Master Output / Slave Input
(MOSI).
4.3 GPIO pinout overview
The specific GPIO pins available in EFM32LG230 is shown in Table 4.3 (p. 51) . Each GPIO port is
organized as 16-bit ports indicated by letters A through F, and the individual pin on this port in indicated
by a number from 15 down to 0.
Table 4.3. GPIO Pinout
Port
Pin
15
Pin
14
Pin
13
Pin
12
Pin
11
Pin
10
Pin
9
Pin
8
Pin
7
Pin
6
Pin
5
Pin
4
Pin
3
Pin
2
Pin
1
Pin
0
Port A
PA15
-
PA10
PA9
PA8
-
PA6
PA5
PA4
PA3
PA2
PA1
PA0
Port B
-
PB14
PB13
PB12
PB11
-
PB8
PB7
-
Port C
PC15
PC14
PC13
PC12
PC11
PC10
PC9
PC8
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
Port D
-
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
Port E
PE15
PE14
PE13
PE12
PE11
PE10
PE9
PE8
-
Port F
-
PF5
PF4
PF3
PF2
PF1
PF0
4.4 Opamp pinout overview
The specific opamp terminals available in EFM32LG230 is shown in Figure 4.2 (p. 52) .
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