參數(shù)資料
型號(hào)： EG-2021CA80MCHPN
元件分類： XO, clock
英文描述： CRYSTAL OSCILLATOR, CLOCK, 80 MHz, LVCMOS OUTPUT
文件頁(yè)數(shù)： 1/3頁(yè)
文件大?。?/td> 49K
代理商： EG-2021CA80MCHPN
EG2021 Rev.0.6 35I
EG-2021CA
2.5V LVCMOS Output Oscillator
Features
Generates high frequency clock from a high stability SAW (Surface Acoustic Wave) resonator.
2.5V-CMOS output.
Very low jitter/low phase noise.
Small SMD in 7x5mm, Max1.4mm height, ceramic package.
Applications
Ethernet, Fibre channel, InfiniBand, PCI-Express, RapidIO, Hypertransport, SONET etc.
Absolute Maximum Ratings
Item
Symbol
Unit
MIN.
TYP.
MAX.
Condition
Supply Voltage
VCC
V
-0.5
+4.0
VDD – GND
Storage temperature
Tstg
°C
-40
+100
Stored as bare product.
Solder heat resistance
Tsol
Max. 240
°C x Max. 10s x 2 times
Operating range
Item
Symbol
Unit
MIN.
TYP.
MAX.
Condition
Supply voltage
VDD
V
2.375
2.5
2.625
0
+70
P version
Operating temperature
Topr
°C
-5
+85
R version
Output load
CL
pF
15
Frequency characteristics
(VDD=2.375 to 2.625,GND=0.0V,Load=Max,)
Item
Symbol
Unit
MIN.
TYP.
MAX.
Condition
Output frequency Range
fosc
MHz
62.5
170
+/-100
H stability, *1
Frequency Stability
df/f0
ppm
+/-50
G stability, *1
*1 This includes initial frequency tolerance, temperature, supply voltage variation and loading variation.
Electrical characteristics
(VDD=2.375 to 2.625,GND=0.0V,Load=Max)
Item
Symbol
Unit
MIN.
TYP.
MAX.
Condition
Start up time
Tosc
ms
10
t=0 at VDD=2.375V
mA
20
TBD
CL=15pF
Current consumption
IOP
mA
15
TBD
No Load
Output disable current
IOE
mA
0.6
OE=GND
Rise time
tTLH
ns
1.0
TBD
20-80% of (VOH-VOL)
Fall time
tTHL
ns
1.0
TBD
80-20% of (VOH-VOL)
Duty
tw/t
45
55
at 50% VDD
High level output voltage
VOH
V
VDD -0.4
IOH=-8mA
Low level output voltage
VOL
V
0.4
IOL=8mA
High level input voltage
VIH
V
0.7VDD
OE Terminal
Low level input voltage
VIL
V
0.3VDD
OE Terminal
UI
0.027x10
-3
RMS, @62.5 to 170MHz
Phase Jitter *2
12KHz to 20MHz offset
tPJ
ps
0.21
RMS, @125MHz
tRJ
ps
3
4
σ of Random Jitter
Period Jitter *3
n=50000 samples
tp-p
ps
25
40
Peak to Peak of jitter distribution
Accumulated Jitter *3
n=2 to 50000 cycles
tacc
ps
4
5
σ of Total jitter distribution
*2 Measured by SSB phase noise test equipment. *3 Measured by Time interval analyzer or oscilloscope.
EPSON ELECTRONICS AMERICA, INC.
www.eea.epson.com
Preliminary
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