11 FN7312.9 August 28, 2012 Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, a good pr" />
參數(shù)資料
型號(hào): EL5173IYZ-T7
廠商: Intersil
文件頁(yè)數(shù): 3/14頁(yè)
文件大?。?/td> 0K
描述: IC DRVR TWISTED 450MHZ SGL 8MSOP
標(biāo)準(zhǔn)包裝: 1
放大器類型: 差分
電路數(shù): 1
輸出類型: 差分
轉(zhuǎn)換速率: 900 V/µs
-3db帶寬: 450MHz
電流 - 輸入偏壓: 11µA
電壓 - 輸入偏移: 3000µV
電流 - 電源: 12mA
電流 - 輸出 / 通道: 55mA
電壓 - 電源,單路/雙路(±): 4.75 V ~ 11 V,±2.38 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: EL5173IYZ-T7DKR
EL5173, EL5373
11
FN7312.9
August 28, 2012
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit board
layout is necessary for optimum performance. Lead lengths
should be as short as possible. The power supply pin must be
well bypassed to reduce the risk of oscillation. For normal
single supply operation, where the VS- pin is connected to the
ground plane, a single 4.7F tantalum capacitor in parallel
with a 0.1F ceramic capacitor from VS+ to GND will suffice.
This same capacitor combination should be placed at each
supply pin to ground if split supplies are to be used. In this
case, the VS- pin becomes the negative supply rail.
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire-wound resistors should be
avoided because of their additional series inductance. Use of
sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the inverting
input pin. Strip line design techniques are recommended for
the signal traces.
Typical Applications
0
Ω
VFB
VINB
VREF
EL5175/
EL5375
EL5173/
EL5373
VOUT
50
ZO = 100Ω
VIN
50
Ω
50
Ω
FIGURE 25. TWISTED PAIR CABLE DRIVER
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