參數(shù)資料
型號: EL5221CY
廠商: Intersil
文件頁數(shù): 13/13頁
文件大?。?/td> 0K
描述: IC OPAMP DUAL R-R 12MHZ 8-MSOP
標準包裝: 50
放大器類型: 緩沖器
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 10 V/µs
-3db帶寬: 12MHz
電流 - 輸入偏壓: 2nA
電壓 - 輸入偏移: 2000µV
電流 - 電源: 500µA
電流 - 輸出 / 通道: 120mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 16.5 V,±2.25 V ~ 8.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 8-MSOP
包裝: 管件
9
FN7187.2
July 25, 2007
Applications Information
Product Description
The EL5221 unity gain buffer is fabricated using a high
voltage CMOS process. It exhibits rail-to-rail input and
output capability and has low power consumption (500A
per buffer). These features make the EL5221 ideal for a wide
range of general-purpose applications. When driving a load
of 10k
Ω and 12pF, the EL5221 has a -3dB bandwidth of
12MHz and exhibits 10V/s slew rate.
Operating Voltage, Input, and Output
The EL5221 is specified with a single nominal supply voltage
from 5V to 15V or a split supply with its total range from 5V
to 15V. Correct operation is guaranteed for a supply range of
4.5V to 16.5V. Most EL5221 specifications are stable over
both the full supply range and operating temperatures of
-40°C to +85°C. Parameter variations with operating voltage
and/or temperature are shown in the typical performance
curves.
The output swings of the EL5221 typically extend to within
80mV of positive and negative supply rails with load currents
of 5mA. Decreasing load currents will extend the output
voltage range even closer to the supply rails. Figure 1 shows
the input and output waveforms for the device. Operation is
from ±5V supply with a 10k
Ω load connected to GND. The
input is a 10VP-P sinusoid. The output voltage is
approximately 9.985VP-P.
.
FIGURE 1. OPERATION WITH RAIL-TO-RAIL INPUT AND
OUTPUT
Short Circuit Current Limit
The EL5221 will limit the short circuit current to ±120mA if
the output is directly shorted to the positive or the negative
supply. If an output is shorted indefinitely, the power
dissipation could easily increase such that the device may
be damaged. Maximum reliability is maintained if the output
continuous current never exceeds ±30mA. This limit is set by
the design of the internal metal interconnects.
Output Phase Reversal
The EL5221 is immune to phase reversal as long as the
input voltage is limited from VS- -0.5V to VS+ +0.5V. Figure 2
shows a photo of the output of the device with the input
voltage driven beyond the supply rails. Although the device's
output will not change phase, the input's overvoltage should
be avoided. If an input voltage exceeds supply voltage by
Pin Descriptions
6 LD SOT-23 8 LD MSOP
PIN NAME
FUNCTION
EQUIVALENT CIRCUIT
1
3
VINA
Buffer A Input
Circuit 1
2
4
VS-
Negative Supply Voltage
3
5
VINB
Buffer B Input
(Reference Circuit 1)
4
7
VOUTB
Buffer B Output
Circuit 2
5
8
VS+
Positive Supply Voltage
6
1
VOUTA
Buffer A Output
(Reference Circuit 2)
VS+
VS-
VS+
GND
VS-
Out
p
u
t
Inp
u
t
5V
10S
VS=±5V
TA=25°C
VIN=10VP-P
EL5221
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