- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄362635 > EL5287CY (INTERSIL CORP) Replaced by PTN04050A : PDF資料下載
參數(shù)資料
| 型號(hào)： | EL5287CY |
| 廠商： | INTERSIL CORP |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | Replaced by PTN04050A : |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO10 |
| 封裝： | MSOP-10 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大小： | 136K |
| 代理商： | EL5287CY |
6
Timing Diagram
V
IN
V
OD
t
h
t
s
t
pd
-
t
pw
(D)
t
d
+
Latch
Enable
Input
Latch
Compare
Latch
Latch
Compare
Differenti
al Input
Voltage
Comparator
Output
1.4V
V
OS
2.4V
Definition of Terms
TERM
DEFINITION
V
OS
Input Offset Voltage - Voltage applied between the two input terminals to obtain CMOS logic threshold at the output
V
IN
Input Voltage Pulse Amplitude - Usually set to 1V for comparator specifications
V
OD
Input Voltage Overdrive - Usually set to 50mV and in opposite polarity to VIN for comparator specifications
t
pd
+
Input to Output High Delay - The propagation delay measured from the time the input signal crosses the input offset voltage to
the CMOS logic threshold of an output low to high transition
t
pd
-
Input to Output Low Delay - The propagation delay measured from the time the input signal crosses the input offset voltage to
the CMOS logic threshold of an output high to low transition
t
d
+
Latch Disable to Output High Delay - The propagation delay measured from the latch signal crossing the CMOS threshold in a
low to high transition to the point of the output crossing CMOS threshold in a low to high transition
t
d
-
Latch Disable to Output Low Delay - The propagation delay measured from the latch signal crossing the CMOS threshold in a
low to high transition to the point of the output crossing CMOS threshold in a high to low transition
t
s
Minimum Setup Time - The minimum time before the negative transition of the latch signal that an input signal change must be
present in order to be acquired and held at the outputs
t
h
Minimum Hold Time - The minimum time after the negative transition of the latch signal that an input signal must remain
unchanged in order to be acquired and held at the output
t
pw
(D)
Minimum Latch Disable Pulse Width - The minimum time that the latch signal must remain high in order to acquire and hold an
input signal change
EL5287
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EL5287CY-T13 | Window 4ns High-Speed Comparator |
| EL5292CS | Replaced by PTN04050C : |
| EL5292CS-T7 | Replaced by PTN04050C : |
| EL5292CY | Dual 600MHz Current Feedback Amplifier with Enable |
| EL5292 | Replaced by PTN04050A : |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EL5287CY-T13 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Window 4ns High-Speed Comparator |
| EL5292 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual 600MHz Current Feedback Amplifier with Enable |
| EL5292_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual 600MHz Current Feedback Amplifier with Enable |
| EL5292A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual 600MHz Current Feedback Amplifier with Enable |
| EL5292ACY | 功能描述:IC AMP CFA DUAL 600MHZ 10-MSOP RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類型:通用 電路數(shù):2 輸出類型:滿擺幅 轉(zhuǎn)換速率:1.8 V/µs 增益帶寬積:6.5MHz -3db帶寬:4.5MHz 電流 - 輸入偏壓:5nA 電壓 - 輸入偏移:100µV 電流 - 電源:65µA 電流 - 輸出 / 通道:35mA 電壓 - 電源，單路/雙路(±):1.8 V ~ 5.25 V，±0.9 V ~ 2.625 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:10-MSOP 包裝:管件 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。