12 FN7307.8 August 28, 2012 voltage, plus the power in the IC due to the load, or as represented in Equation 5: Where:
參數(shù)資料
型號: EL5371IUZ-T13
廠商: Intersil
文件頁數(shù): 4/15頁
文件大?。?/td> 0K
描述: IC DRIVER TWIST PR 200MHZ 28QSOP
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 差分
電路數(shù): 3
輸出類型: 差分
轉(zhuǎn)換速率: 700 V/µs
增益帶寬積: 100MHz
-3db帶寬: 250MHz
電流 - 輸入偏壓: 6µA
電壓 - 輸入偏移: 1500µV
電流 - 電源: 7.5mA
電流 - 輸出 / 通道: 120mA
電壓 - 電源,單路/雙路(±): 4.75 V ~ 11 V,±2.38 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 28-QSOP
包裝: 帶卷 (TR)
EL5171, EL5371
12
FN7307.8
August 28, 2012
voltage, plus the power in the IC due to the load, or as
represented in Equation 5:
Where:
VSTOT = Total supply voltage = VS+ - VS-
ISMAX = Maximum quiescent supply current per channel
ΔVO = Maximum differential output voltage of the application
RLD = Differential load resistance
ILOAD = Load current
i = Number of channels
By setting the two PDMAX equations equal to each other, we can
solve the output current and RLOAD to avoid the device overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit board
layout is necessary for optimum performance. Lead lengths
should be as sort as possible. The power supply pin must be well
bypassed to reduce the risk of oscillation. For normal single
supply operation, where the VS- pin is connected to the ground
plane, a single 4.7F tantalum capacitor in parallel with a 0.1F
ceramic capacitor from VS+ to GND will suffice. This same
capacitor combination should be placed at each supply pin to
ground if split supplies are to be used. In this case, the VS- pin
becomes the negative supply rail.
For good AC performance, parasitic capacitance should be kept
to a minimum. Use of wire wound resistors should be avoided
because of their additional series inductance. Use of sockets
should also be avoided, if possible. Sockets add parasitic
inductance and capacitance that can result in compromised
performance. Minimizing parasitic capacitance at the amplifier's
inverting input pin is very important. The feedback resistor
should be placed very close to the inverting input pin. Strip line
design techniques are recommended for the signal traces.
As the signal is transmitted through a cable, the high frequency
signal will be attenuated. One way to compensate this loss is to
boost the high frequency gain at the receiver side.
Typical Applications
FIGURE 27. TWISTED PAIR CABLE RECEIVER
(EQ. 5)
PD
i
V
STOT
I
SMAX
×
V
(
STOT
ΔV
O )
ΔV
O
R
LD
------------
×
+
×
=
FBP
RG
RF
IN+
IN-
REF
FBN
RF
RFR
RGR
IN+
IN-
REF
EL5172/
EL5372
EL5171/
EL5371
VO
50
RT
TWISTED PAIR
ZO = 100Ω
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