參數(shù)資料
型號(hào): EL7564CREZ
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: Monolithic 4 Amp DC/DC Step-Down Regulator
中文描述: 5 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDSO28
封裝: ROHS COMPLIANT, MO-153, HTSSOP-28
文件頁(yè)數(shù): 11/17頁(yè)
文件大小: 644K
代理商: EL7564CREZ
11
FN7297.3
May 9, 2005
NMOS Power FETs and Drive Circuitry
The EL7564 integrates low on-resistance (30m
) NMOS
FETs to achieve high efficiency at 4A. In order to use an
NMOS switch for the high-side drive it is necessary to drive
the gate voltage above the source voltage (L
X
). This is
accomplished by bootstrapping the V
HI
pin above the L
X
voltage with an external capacitor C
VHI
and internal switch
and diode. When the low-side switch is turned on and the
L
X
voltage is close to GND potential, capacitor C
VHI
is
charged through an internal switch to V
DRV
, typically 5V. At
the beginning of the next cycle the high-side switch turns
on and the L
X
pins begin to rise from GND to V
IN
potential.
As the L
X
pin rises the positive plate of capacitor C
VHI
follows and eventually reaches a value of V
DRV
+ V
IN
,
typically 10V, for V
DRV
= V
IN
= 5V. This voltage is then
level shifted and used to drive the gate of the high-side
FET, via the V
HI
pin. A value of 0.22μF for C
VHI
is
recommended.
Reference
A 1.5% temperature compensated bandgap reference is
integrated in the EL7564. The external V
REF
capacitor acts
as the dominant pole of the amplifier and can be increased
in size to maximize transient noise rejection. A value of
0.1μF is recommended.
Oscillator
The system clock is generated by an internal relaxation
oscillator with a maximum duty-cycle of approximately 95%.
Operating frequency can be adjusted through C
OSC
.
When external synchronization is required, always choose
C
OSC
such that the free-running frequency is at least 20%
lower than that of the sync source to accommodate
component and temperature variations. Figure 21 shows a
typical connection.
Junction Temperature Sensor
An internal temperature sensor continuously monitors die
temperature. In the event that the die temperature exceeds
the thermal trip-point, the system is in a fault state and will
be shut down. The upper and low trip-points are set to 135°C
and 115°C respectively.
The V
TJ
pin is an accurate indication of the internal silicon
junction temperature (see performance curve.) The junction
temperature T
J
(°C) can be determined from the following
relation:
Where V
TJ
is the voltage at the V
TJ
pin in volts.
Power Good and Power On Reset
During power up the output regulator will be disabled until
V
IN
reaches a value of approximately 4V. About 500mV
hysteresis is present to eliminate noise-induced oscillations.
Under-voltage and over-voltage conditions on the regulator
output are detected through an internal window comparator.
A logic high on the PG output indicates that the regulated
output voltage is within about +10% of the nominal selected
T
J
75
--------–
+
=
2
3
16
15
14
13
5
6
7
12
11
9
8
10
19
18
EL7564
1
20
EXTERNAL
OSCILLATOR
BAT54S
100pF
390pF
FIGURE 23. OSCILLATOR SYNCHRONIZATION
EL7564
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