FN7103.9 September 14, 2010 Description of Operation and Application Information Product Description The EL8100, EL8101 are" />
參數(shù)資料
型號(hào): EL8100IS-T13
廠商: Intersil
文件頁(yè)數(shù): 13/14頁(yè)
文件大小: 0K
描述: IC AMP SGL R-R 200MHZ 8-SOIC
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 電壓反饋
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 200 V/µs
增益帶寬積: 100MHz
-3db帶寬: 200MHz
電流 - 輸入偏壓: 1.5µA
電壓 - 輸入偏移: 800µV
電流 - 電源: 2mA
電流 - 輸出 / 通道: 65mA
電壓 - 電源,單路/雙路(±): 3 V ~ 5 V,±1.5 V ~ 2.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
8
FN7103.9
September 14, 2010
Description of Operation and Application
Information
Product Description
The EL8100, EL8101 are wide bandwidth, single supply, low
power and rail-to-rail output voltage feedback operational
amplifiers. Both amplifiers are internally compensated for
closed loop gain of +1 of greater. Connected in voltage
follower mode and driving a 1k
Ω load, the EL8100, EL8101
have a -3dB bandwidth of 200MHz. Driving a 150
Ω load, the
bandwidth is about 130MHz while maintaining a 200V/s
slew rate. The EL8100 is available with a power-down pin to
reduce power to 30A typically while the amplifier is
disabled.
Input, Output and Supply Voltage Range
The EL8100, EL8101 have been designed to operate with a
single supply voltage from 3V to 5.0V. Split supplies can also
be used as long as their total voltage is within 3V to 5.0V.
The amplifiers have an input common mode voltage range
from 0.15V below the negative supply (VS- pin) to within
1.5V of the positive supply (VS+ pin). If the input signal is
outside the above specified range, it will cause the output
signal to be distorted.
The output of the EL8100, EL8101 can swing rail-to-rail. As
the load resistance becomes lower, the ability to drive close
to each rail is reduced. For the load resistor 1k
Ω, the output
swing is about 4.9V at a 5V supply. For the load resistor
150
Ω, the output swing is about 4.6V.
Choice of Feedback Resistor and Gain Bandwidth
Product
For applications that require a gain of +1, no feedback
resistor is required. Just short the output pin to the inverting
input pin. For gains greater than +1, the feedback resistor
forms a pole with the parasitic capacitance at the inverting
input. As this pole becomes smaller, the amplifier’s phase
margin is reduced. This causes ringing in the time domain
FIGURE 23. DISABLED RESPONSE
FIGURE 24. ENABLED RESPONSE
FIGURE 25. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Typical Performance Curves (Continued)
VS = ±2.5V, AV = 1, RL = 1kΩ
CH1, CH2, 0.5V/DIV, M = 20ns
CH2
CH1
ENABLE
INPUT
OUTPUT
VS = ±2.5V, AV = 1, RL = 1kΩ
CH1, CH2, 1V/DIV, M = 100ns
CH2
CH1
ENABLE
INPUT
VOUT
909mW
1.4
1.2
1.0
0.8
0.6
0.2
0
25
50
75
100
150
125
85
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.4
AMBIENT TEMPERATURE (°C)
POWE
R
DI
SSI
P
A
TI
ON
(W)
435mW
SO8
θJA = +110°C/W
SOT23-5/6
θJA = +230°C/W
1.0
0.9
0.8
0.6
0.4
0.1
0
25
50
75
100
150
AMBIENT TEMPERATURE (°C)
POWE
R
DI
SSI
P
A
TI
ON
(W)
125
85
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.2
0.7
0.3
0.5
625mW
SO8
θJA = +160°C/W
SOT23-5/6
θJA = +256°C/W
391mW
EL8100, EL8101
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