參數(shù)資料
型號(hào): EL8102IWZ-T7
廠商: Intersil
文件頁數(shù): 3/15頁
文件大?。?/td> 0K
描述: IC AMP 500MHZ R-R SGL SOT23-6
產(chǎn)品培訓(xùn)模塊: High Speed Op Amps
標(biāo)準(zhǔn)包裝: 1
放大器類型: 電壓反饋
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 600 V/µs
增益帶寬積: 200MHz
-3db帶寬: 500MHz
電流 - 輸入偏壓: 6µA
電壓 - 輸入偏移: 800µV
電流 - 電源: 5.6mA
電流 - 輸出 / 通道: 65mA
電壓 - 電源,單路/雙路(±): 3 V ~ 5 V,±1.5 V ~ 2.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6
供應(yīng)商設(shè)備封裝: SOT-23-6
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1234 (CN2011-ZH PDF)
其它名稱: EL8102IWZ-T7DKR
11
FN7104.7
August 10, 2007
Typical Applications
VIDEO SYNC PULSE REMOVER
Many CMOS analog to digital converters have a parasitic
latch up problem when subjected to negative input voltage
levels. Since the sync tip contains no useful video
information and it is a negative going pulse, we can chop it
off. Figure 30 shows a gain of 2 connections for EL8102,
EL8103. Figure 31 shows the complete input video signal
applied at the input, as well as the output signal with the
negative going sync pulse removed.
MULTIPLEXER
Besides the normal power-down usage, the ENABLE pin of
the EL8102 can be used for multiplexing applications. Figure
32 shows two EL8102 with the outputs tied together, driving
a back terminated 75
Ω video load. A 2V
P-P 2MHz sine wave
is applied to Amp A and a 1VP-P 2MHz sine wave is applied
to Amp B. Figure 33 shows the ENABLE signal and the
resulting output waveform at VOUT. Observe the break-
before-make operation of the multiplexing. Amp A is on and
VIN1 is passed through to the output when the ENABLE
signal is low and turns off in about 25ns when the ENABLE
signal is high. About 200ns later, Amp B turns on and VIN2 is
passed through to the output. The break-before-make
operation ensures that more than one amplifier isn’t trying to
drive the bus at the same time.
SINGLE SUPPLY VIDEO LINE DRIVER
The EL8102 and EL8103 are wideband rail-to-rail output op
amplifiers with large output current, excellent dG, dP, and low
distortion that allow them to drive video signals in low supply
applications. Figure 34 is the single supply non-inverting
video line driver configuration and Figure 35 is the inverting
video line driver configuration. The signal is AC coupled by
C1. R1 and R2 are used to level shift the input and output to
provide the largest output swing. RF and RG set the AC gain.
C2 isolates the virtual ground potential. RT and R3 are the
termination resistors for the line. C1, C2 and C3 are selected
big enough to minimize the droop of the luminance signal.
FIGURE 30. SYNC PULSE REMOVER
5V
1k
VOUT
VIN
75
Ω
+
-
75
Ω
1k
75
Ω
VS+
VS-
FIGURE 31. VIDEO SIGNAL
1V
0.5V
0V
1V
0.5V
0V
M = 10s/DIV
VOUT
VIN
FIGURE 32. TWO TO ONE MULTIPLEXER
+2.5V
1k
2MHz
75
Ω
+
-
1k
75
Ω
-2.5V
VOUT
75
Ω
1V
P-P
B
+2.5V
1k
2MHz
+
-
1k
75
Ω
-2.5V
2VP-P
A
ENABLE
FIGURE 33.
0V
-0.5V
-1.5V
-2.5V
1V
0V
M = 50ns/DIV
A
ENABLE
B
-1V
EL8102, EL8103
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