參數(shù)資料
型號: EL8401IUZ-T7
廠商: Intersil
文件頁數(shù): 3/15頁
文件大?。?/td> 0K
描述: IC OP AMP 200MHZ R-R 16-QSOP
標準包裝: 1
放大器類型: 電壓反饋
電路數(shù): 4
輸出類型: 滿擺幅
轉換速率: 200 V/µs
增益帶寬積: 100MHz
-3db帶寬: 200MHz
電流 - 輸入偏壓: 1.6µA
電壓 - 輸入偏移: 800µV
電流 - 電源: 2mA
電流 - 輸出 / 通道: 65mA
電壓 - 電源,單路/雙路(±): 3 V ~ 5 V,±1.5 V ~ 2.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應商設備封裝: 16-QSOP
包裝: 標準包裝
產品目錄頁面: 1234 (CN2011-ZH PDF)
其它名稱: EL8401IUZ-T7DKR
11
FN7105.3
August 29, 2007
dissipation could easily increase such that the part will be
destroyed. Maximum reliability is maintained if the output
current never exceeds ±40mA. This limit is set by the design
of the internal metal interconnections.
Power Dissipation
With the high output drive capability of the EL8200, EL8201
and EL8401, it is possible to exceed the 125
°C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if the load conditions or package types need to be
modified for the amplifier to remain in the safe operating
area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
θ
JA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
For sourcing:
For sinking:
Where:
VS = Total supply voltage
ISMAX = Maximum quiescent supply current
VOUTi = Maximum output voltage of the application for
each channel
RLOADi = Load resistance tied to ground for each channel
ILOADi = Load current for each channel
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOADi to avoid the device
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as sort as possible. The power supply pin
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the VS- pin is
connected to the ground plane, a single 4.7F tantalum
capacitor in parallel with a 0.1F ceramic capacitor from VS+
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the VS- pin becomes the negative
supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
Typical Applications
VIDEO SYNC PULSE REMOVER
Many CMOS analog to digital converters have a parasitic
latch up problem when subjected to negative input voltage
levels. Since the sync tip contains no useful video
information and it is a negative going pulse, we can chop it
off. Figure 29 shows a gain of 2 connections. Figure 30
shows the complete input video signal applied at the input,
as well as the output signal with the negative going sync
pulse removed.
MULTIPLEXER
Besides the normal power down usage, the ENABLE pin of
the EL8200 can be used for multiplexing applications.
Figure 31 shows two channels with the outputs tied together,
driving a back terminated 75
Ω video load. A 2V
P-P 2MHz
sine wave is applied to Amp A and a 1VP-P 2MHz sine wave
is applied to Amp B. Figure 32 shows the ENABLE signal
and the resulting output waveform at VOUT. Observe the
break-before-make operation of the multiplexing. Amp A is
on and VIN1 is passed through to the output when the
ENABLE signal is low and turns off in about 25ns when the
ENABLE signal is high. About 200ns later, Amp B turns on
and VIN2 is passed through to the output. The break-before-
make operation ensures that more than one amplifier isn’t
trying to drive the bus at the same time.
PD
MAX
T
JMAX
T
AMAX
θ
JA
---------------------------------------------
=
PD
MAX
V
S
I
SMAX
Σ V
S
V
OUTi
()
V
OUTi
R
Li
-----------------
×
+
×
=
PD
MAX
V
S
I
SMAX
Σ V
OUTi
V
S-
() I
LOADi
×
+
×
=
FIGURE 29. SYNC PULSE REMOVER
5V
1K
VOUT
VIN
75
Ω
+
-
75
Ω
1K
75
Ω
VS+
VS-
EL8200, EL8201, EL8401
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