3
FN7305.5
November 30, 2007
PSRR
Power Supply Rejection Ratio
DC to 100kHz, ±5V supply
60
dB
LOGIC CONTROL PINS
VHI
Logic High Level
VIN - VLOGIC ref for guaranteed high level
1.35
V
VLOW
Logic Low Level
VIN - VLOGIC ref for guaranteed low level
0.8
V
ILOGICH
Logic High Input Current
VIN = 5V, VLOGIC = 0V
50
A
ILOGICL
Logic Low Input Current
VIN = 0V, VLOGIC = 0V
15
A
NOTE:
1. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
Electrical Specifications
VSA+ = VA+ = +5V, VSA- = VA- = -5V, TA = +25°C, Unless Otherwise Specified (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 1)
TYP
MAX
(Note 1)
UNIT
Pin Descriptions
PIN NUMBER
PIN NAME
PIN TYPE
PIN FUNCTION
1
CTRL_REF
Input
Reference voltage for VGAIN and VCTRL pins
2
VCTRL
Input
Control voltage (0 to 1V) to set equalization
3
VINP
Input
Positive differential input
4
VINM
Input
Negative differential input
5
VS-
Power
-5V to core of chip
6
CMOUT
Output
Output of common mode voltage present at inputs
7
VGAIN
Input
Control voltage to set overall gain (0V to 1V)
8
LOGIC_REF
Input
Reference voltage for all logic signals
9
X2
Logic Input
Logic signal; low - gain = 1, high - gain = 2
10
0V
0V reference for output voltage
11
VSA-
Power
-5V to output buffer
12
VOUT
Output
Single-ended output voltage reference to pin 10
13
VSA+
Power
+5V to output buffer
14
ENBL
Logic Input
Logic signal to enable pin; low - disabled, high - enabled
15
VS+
Power
+5V to core of chip
16
CMEXT
Logic Input
Logic signal to enable CM range extension; active high
EL9110