參數(shù)資料
型號: ELANSC300-25VC
廠商: ADVANCED MICRO DEVICES INC
元件分類: 微控制器/微處理器
英文描述: Highly Integrated, Low-Power, 32-Bit Microcontroller
中文描述: 32-BIT, 25 MHz, MICROCONTROLLER, PQFP208
封裝: TQFP-208
文件頁數(shù): 132/139頁
文件大?。?/td> 1388K
代理商: ELANSC300-25VC
132
élanSC300 Microcontroller Data Sheet
P R E L I M I N A R Y
Notes:
1.
These timings apply only to the B4 version of the élanSC300 microcontroller. The timings for the B3 version are t2b = 0 ns,
t3b = 550 ns, t11b = -2 ns, and t13 = -4 ns.
These timings may be modified via the MMS Memory Wait State 1 Register, Index 62h, and the Command Delay Register, Index
60h. (See the élan
TM
SC300 Microcontroller Programmer’s Reference Manual
, order #18470.)
Table 70.
ISA I/O 8-Bit Read/Write Cycle (See Figure 53)
Symbol
Parameter Description
Notes
Preliminary
Units
Min
Max
t1a
SA stable to IOW active
200
ns
t1b
SA stable to IOR active
150
ns
t2a
SA hold from IOW inactive
50
ns
t2b
SA hold from IOR inactive
1
50
ns
t3a
IOW pulse width
450
ns
t3b
IOR pulse width
1
505
ns
t4a
IOW active to IOCHRDY inactive
300
ns
t4b
IOR active to IOCHRDY inactive
350
ns
t5a
IOW hold from IOCHRDY active
110
ns
t5b
IOR hold from IOCHRDY active
160
ns
t6
RDDATA setup to command inactive
40
ns
t7
RDDATA hold from command inactive
0
ns
t8
WRDATA setup to command inactive
400
ns
t9
WRDATA hold from command inactive
50
ns
t10
DBUFOE active from command
5
ns
t11a
DBUFOE hold from command write
50
ns
t11b
DBUFOE hold from command read
1
50
ns
t12
ENDIRH, ENDIRL setup to IOR
150
ns
t13
ENDIRH, ENDIRL hold from IOR
1
50
ns
t14
BALE pulse width
50
ns
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