參數(shù)資料
型號(hào): ELANSC400-66AI
廠商: ADVANCED MICRO DEVICES INC
元件分類: 微控制器/微處理器
英文描述: Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers
中文描述: 32-BIT, FLASH, 66 MHz, MICROCONTROLLER, PBGA292
封裝: PLASTIC, BGA-292
文件頁數(shù): 43/132頁
文件大?。?/td> 2400K
代理商: ELANSC400-66AI
élanSC400 and élanSC410 Microcontrollers Data Sheet
43
SD11 [D27]
SD12 [D28]
SD13 [D29]
SD14 [D30]
SD15 [D31]
K1
L1
L2
N1
L3
B [B]
B [B]
B [B]
B [B]
B [B]
C–E
4
C–E
4
C–E
4
C–E
4
C–E
4
70
70
70
70
70
V
CC
V
CC
V
CC
V
CC
V
CC
TS-PD
TS-PD
TS-PD
TS-PD
TS-PD
B-PPUD
B-PPUD
B-PPUD
B-PPUD
B-PPUD
I-PD
I-PD
I-PD
I-PD
I-PD
5
S
S
S
S
S
5
5
5
5
Notes:
1. Pin states for AEN, IOCHRDY, IOCS16, PDACK0
, PDRQ0, TC, and PIRQ1–PIRQ0 are listed in Table 9 on page 49.
Pin states for BALE, MCS16, SBHE, PDACK1, PDRQ1 and PIRQ7–PIRQ2 are listed in Table 14 on page 53.
2. The ISA control signals have three programmable options for Suspend mode:
–Driven High (inactive).
–Three-stated with no pullup or pulldown. This is useful when the ISA device is at 5 V and left powered in Suspend. The
board design should not drive 3.3-V signals into a 5-V device during Suspend because this can waste power. The system
designer should provide large pullup resistors to 5 V for each of these signals on the board if this configuration is
programmed.
– Three-stated with pulldown resistors when suspended with the intent of powering off the ISA device
(Power-Down Group C).
Be careful when handling IOR and IOW because they are shared with the PC Card sockets and may need to be buffered if
certain combinations of system components are powered up and off.
Summary:
These pins have built-in pulldown resistors that are invoked by:
–Suspend mode and the ISA interface is programmed to be powered off in Suspend mode (Power-Down Group C).
3. The SA bus, SA25–SA0, and the RSTDRV signal are three-stated with pulldowns in Suspend mode. This accommodates
having the ISA bus, PC Card sockets, VL bus, and ROM interfaces left powered on or powered off in Suspend mode.
Summary:
These pins have built-in pulldown resistors that are invoked by:
–Suspend mode.
4. C, D, and E output drives are programmable.
5. The combination of SD15–SD0 and D31–D16 on the same pins requires the signals to be pulled up in SD bus mode (for PC
compatibility) and pulled down in D bus mode (for consistency with D15–D0). Regardless of the mode the bus is in, the pins
are in the input state (i.e., they are still bidirectional and are not driven as outputs) and pulled down in Suspend mode.
These signals are pulled up or down automatically depending on whether the SD buffer is enabled or not (CFG3), and whether
the system is in Suspend mode or not.
Summary:
These pins have built-in pulldown and pullup resistors that are invoked by:
–Reset invokes the pulldown resistors.
–Suspend mode invokes the pulldown resistors.
–Operating (Hyper/High/Low/Temp Low-Speed modes): the pins will have pullups if the SD buffer control signals are
enabled, and have pulldowns otherwise.
Table 6.
Pin State Table—System Interface
1
(Continued)
Signal Name
[Alternate
Function]
Pin
#
Type
Output
Drive
Max
Load
(pF)
Supply
Reset
State
Normal
Operation
Suspend
State
Power
Down
Group
Note
5 V
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