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參數(shù)資料
| 型號(hào)： | EM39LV040-70FMI |
| 廠商： | ELAN Microelctronics Corp . |
| 英文描述： | 4M (512Kx8) Bits Flash Memory |
| 中文描述： | 4分（512Kx8）位快閃記憶體 |
| 文件頁數(shù)： | 4/21頁 |
| 文件大?。?/td> | 275K |
| 代理商： | EM39LV040-70FMI |
EM39LV040
4M (512Kx8) Bits Flash Memory
SPECIFICATION
Device Operation
The EM39LV040 uses Commands to initiate the memory operation functions. The
Commands are written to the device by asserting WE# Low while keeping CE# Low. The
address bus is latched on the falling edge of WE# or CE#, whichever occurs last. The data
bus is latched on the rising edge of WE# or CE#, whichever occurs first.
Read
The Read operation of the EM39LV040 is controlled by CE# and OE#. Both have to be Low
for the system to obtain data from the outputs. CE# is used for device selection. When CE#
is high, the chip is deselected and only standby power is consumed. OE# is the output
control and is used to gate data from the output pins. The data bus is in high impedance state
when either CE# or OE# is high. Refer to the Read Cycle Timing Diagram in Figure 1 for
further details.
Byte Program
The EM39LV040 is programmed on a byte-by-byte basis. Before programming, the sector
where the byte is located; must be erased completely. The Program operation is
accomplished in three steps
:
The first step is a three-byte load sequence for Software Data Protection.
The second step is to load byte address and byte data. During the Byte Program
operation, the addresses are latched on the falling edge of either CE# or WE#, whichever
occurs last; and the data is latched on the rising edge of either CE# or WE#, whichever
occurs first.
The third step is the internal Program operation which is initiated after the rising edge of
the fourth WE# or CE#, whichever occurs first. The Pro gram operation, once initiated,
will be completed within 16 μs. See Figures 2 and 3 for WE# and CE# controlled
Program operation timing diagrams respectively and Figure 12 for the corresponding
flowchart.
During the Program operation, the only valid reads are Data# Polling and Toggle Bit. During
the internal Program operation, the host is free to perform additional tasks. Any command
issued during the internal Program operation is ignored.
This specification is subject to change without further notice. (07.22.2004 V1.0)
Page 4 of 21
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EM39LV040-90FDI | 4M (512Kx8) Bits Flash Memory |
| EM39LV040-90FLC | 4M (512Kx8) Bits Flash Memory |
| EM39LV040-70FDC | 4M (512Kx8) Bits Flash Memory |
| EM39LV040-90FDC | 4M (512Kx8) Bits Flash Memory |
| EM39LV800 | 8M Bits (512Kx16) Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EM39LV040-90FDC | 制造商:EMC 制造商全稱:ELAN Microelectronics Corp 功能描述:4M (512Kx8) Bits Flash Memory |
| EM39LV040-90FDI | 制造商:EMC 制造商全稱:ELAN Microelectronics Corp 功能描述:4M (512Kx8) Bits Flash Memory |
| EM39LV040-90FHC | 制造商:EMC 制造商全稱:ELAN Microelectronics Corp 功能描述:4M (512Kx8) Bits Flash Memory |
| EM39LV040-90FHI | 制造商:EMC 制造商全稱:ELAN Microelectronics Corp 功能描述:4M (512Kx8) Bits Flash Memory |
| EM39LV040-90FLC | 制造商:EMC 制造商全稱:ELAN Microelectronics Corp 功能描述:4M (512Kx8) Bits Flash Memory |
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