參數(shù)資料
型號: EM512D16
廠商: Electronic Theatre Controls, Inc.
英文描述: 512K x 16 bit Ultra-Low Power Asynchronous Static RAM
中文描述: 為512k × 16位超低功耗異步靜態(tài)RAM
文件頁數(shù): 2/9頁
文件大?。?/td> 54K
代理商: EM512D16
NanoAmp Solutions, Inc.
2
Stock No. 23144-B 3/01
Advance - Subject to Change Without Notice
EM512D16
Advance Information
FIGURE 3: Functional Block Diagram
TABLE 2: Functional Description
1. When UB and LB are in select mode (low), I/O
0
- I/O
15
are affected as shown. When LB only is in the select mode only I/O
0
- IO
7
are affected as shown. When UB is in the select mode only I/O
8
- I/O
15
are affected as shown. If both UB and LB are in the dese-
lect mode (high), the chip is in a standby mode.
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
TABLE 3: Capacitance*
Note: These parameters are verified in device characterization and are not 100% tested
Control
Logic
32K Page
x 16 Word
x 16 bit
RAM Array
Page
Address
Decode
Logic
Address
Inputs
A
4
- A
18
CE1
CE2
WE
OE
UB
LB
Input/
Output
Mux
and
Buffers
I/O
0
- I/O
7
I/O
8
- I/O
15
Word
Address
Decode
Logic
Address
Inputs
A
0
- A
3
W
o
r
M
u
CE1
CE2
WE
OE
UB
LB
I/O
0
- I/O
151
MODE
POWER
H
X
X
X
X
X
High Z
Standby
2
Standby
2
Standby
X
L
X
X
X
X
High Z
Standby
X
X
X
X
H
H
High Z
Standby
2
Write
3
Read
Active
Standby
L
H
L
X
3
L
L
1
L
1
L
1
L
1
L
1
L
1
Data In
Active
L
H
H
Data Out
Active
L
H
H
H
High Z
Active
Item
Symbol
Test Condition
Min
Max
Unit
Input Capacitance
C
IN
V
IN
= 0V, f = 1 MHz, T
A
= 25
o
C
V
IN
= 0V, f = 1 MHz, T
A
= 25
o
C
8
pF
I/O Capacitance
C
I/O
8
pF
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