參數(shù)資料
型號: EM78P267A
廠商: ELAN Microelctronics Corp .
英文描述: 8-Bit Micro-Controller for Consumer Product(帶2K × 13片上ROM,工作電壓2.5V-5.5V的8位微控制器)
中文描述: 8位微控制器的消費產(chǎn)品(帶2K × 13片上ROM的,工作電壓為2.5V至5.5V的8位微控制器)
文件頁數(shù): 5/20頁
文件大小: 144K
代理商: EM78P267A
5
* This specification are subject to be changed without notice.
EM78P267/467A/B/C
8-BIT MICRO-CONTROLLER FOR CONSUMER PRODUCT
Preliminary
9.5.1997
R3 (Status Register)
7
6
5
4
3
2
1
0
GP
PS1
PS0
T
P
Z
DC
C
Bit 0 ( C )
Carry flag
Bit 1 (DC)
Auxiliary carry flag
Bit 2 (Z)
Zero flag. Set to
1
if the result of an arithmetic or logic operation is zero.
Bit 3 (P)
Power down bit. Set to 1 during power on or by a
WDTC
command and reset to 0 by a
SLEP
command.
Bit 4 (T)
Time-out bit. Set to 1 by the
SLEP
and
WDTC
command, or during power up and reset to 0 by
WDT time-out.
Bits 5 (PS0) ~ 6 (PS1)
Page select bits. PS0~PS1 are used to preselect a program memory page. When executing
a
JMP
,
CALL
, or other instruction which causes the program counter to be changed (e.g. MOV R2,A),
PS0~PS1 are loaded into the 11th and 12th bits of the program counter, selecting one of the available program
memory pages. Note that RET (RETL, RETI) instruction does not change the PS0~PS1 bits. That is, the return
will be always to the page from where the subroutine was called, regardless of the current setting of PS0~PS1
bits.
PS1
0
0
1
1
PS0
0
1
0
1
Program memory page [Address]
Page 0 [000-3FF]
Page 1 [400-7FF]
Page 2 [800-BFF]
Page 3 [C00-FFF]
Bit 7 (GP)
General read/write bit.
R4 (RAM Select Register)
Bits 0~5 are used to select the registers (address: 00~3F) in the indirect addressing mode.
Bits 6~7 determine which bank is activated among the 4 banks.
If no indirect addressing is used, the RSR can be used as an 8-bit wide general purpose read/write register.
See the configuration of the data memory in Fig. 4.
R5 (Port 5)
EM78P267/467A: Only low order 4 bits are used in R5. The high order 4 bits of R5 will be read as
0
.
EM78P267/467B/C: All 8 bits are used in R5.
R6~R7 (Port 6 ~ Port 7)
Two 8-bit I/O registers.
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