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參數(shù)資料
| 型號： | EM78P468NCQ |
| 廠商： | ELAN Microelctronics Corp . |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 44/82頁 |
| 文件大?。?/td> | 1491K |
| 代理商： | EM78P468NCQ |
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EM78P468N
8-BIT Microcontroller
ACC
R3
STACKACC
40
Product Specification (V1.2) 03.15.2005
(This specification is subject to change without further notice)
STACKR3
Interrupt Source
ENI/ DIS
ur
RETI
g. 15. Interrupt Backup Diagram
Fi
I
Interrupt Occ
Table 3 Interrupt Vector
Interrup
ta
Interrupt V
tor
ec
t S tus
0003H
0006H
0009H
000CH
000FH
0012H
0015H
0018H
TCC overflow interrupt.
External interrupt P5.4/INT0 pin
External interrupt P5.5/INT1 pin
Counter 1 underflow interrupt
Cou
und
nter 2
erflow
High-pulse width timer underflow interrupt
Low-pulse width timer underflow interrupt
PORT , PORT 8 input status change wake-up
6
interr
upt
4.9 LCD Driver
This LSI can drive LCD of up to 32 segments and 4 commons t
4*32 dots. LCD blo
is made
comm
tput pins, and LCD operating power supply pins. This
mo
mode
d idle mode. Th
number of common and frame frequency are determined by the LCD controller register.
t can dr
egment
cuit wor
r
l of
ins,
p of LCD driver, display RAM,
l
ut
the
f segment; the
control that uses a subsystem clock to generate the
y ac
s. Th
ude
ol. T
r
l register. The register RB is an LCD RAM data buffer. LCD booster
circuit can change operation frequency to improve VLCD2 and VL
The control register is explained as follows.
regis
/2 and 1/3), duty (1/2,
e, bias (1
RA is an LCD contrast and LCD
co
d
regi
1/3, 1/4), and LCD frame frequency co
RAM address contro
CD d
CD3 drive capability.
ha
s
cir
ive a tota
output p
ks on norma
ck
u
on ou
de, green
an
e LCD d y; bias;
numbe o
The basic structure contains a timing
pr
ing
oper tim
ster for L
river whi
ffere
and
for di
nt duty
ch incl
displa
s L
ntr
cesse
able/disabl
he registe
e R9
ter is a
mman
CD en
R9/LCDCR (LCD Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
BS
DS1
LCDEN
--
LCDTYPE
LCDF1
LCDF0
DS0
Bit 7 (B
as select bit, 0/1=>(1/2 bia
S):
LCD bi
s) / (1/3 bias)
Bit 6 ~ 5 (DS1 ~ DS0):
LCD dut
DS1
elect
LCD Duty
y s
DS0
0
0
1
0
1
X
1/2 duty
1/3 duty
1/4 duty
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