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參數(shù)資料
| 型號： | EM78Q156A |
| 廠商： | ELAN Microelctronics Corp . |
| 英文描述： | 8-Bit Micro-Controller for General-Purpose Product(工作電壓2.5V-6.5V的8位微控制器) |
| 中文描述： | 8位微控制器的通用產(chǎn)品（工作電壓為2.5V至6.5V的8位微控制器） |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 274K |
| 代理商： | EM78Q156A |
* This specification are subject to be changed without notice.
EM78Q156A/B
8-BIT MICRO-CONTROLLER FOR GENERAL PURPOSE PRODUCT
3
2
1
0
-
-
-
-
8
6.30.1998
Preliminary
7
6
5
-
4
WDTE
EIS
ROC
Bit 7 (WDTE)
Control bit used to enable Watchdog timer.
0: Disable WDT
1: Enable WDT
WDTE bit is readable and writable.
Control bit used to select the function of P60(/INT) pin.
0: P60, bidirectional I/O pin.
1: /INT, external interrupt input pin. In this case, the I/O control bit of P60 (bit 0 of IOC6) must
be set to "1".
When EIS is “0”, the path of /INT is masked. When EIS is "1", the status of /INT pin can also
be read by Port 6(R6). Refer to Fig. 7(a). EIS bit is readable and writable.
ROC is used for the R-option. Setting ROC to “1” will enable the status of R-option pins
(P50~P51) to be read by the controller. Clearing ROC will disable the R-option function. If the
R-option function is used, the user must connect the P51 pin or/and P50 pin to VSS by a 430K
external resistir (Rex). If Rex is connected/disconnected, the status of P50(P51) will be read
as "0"/"1" when ROC is set to "1". Refer to Fig. 8. ROC bit is readable and writable.
Not used.
Bit 6 (EIS)
Bit 4 (ROC)
Bits 0 ~ 3, 5
IOCF (Interrupt Mask Register)
7
-
6
-
5
-
4
-
3
-
2
1
0
EXIE
ICIE
TCIE
Bit 0 (TCIE)
TCIF interrupt enable bit.
0: disable TCIF interrupt
1: enable TCIF interrupt
ICIF interrupt enable bit.
0: disable ICIF interrupt
1: enable ICIF interrupt
EXIF interrupt enable bit.
0: disable EXIF interrupt
1: enable EXIF interrupt
Not used.
Bit 1 (ICIE)
Bit 2 (EXIE)
Bits 3 ~ 7
Individual interrupt is enabled by setting its associated control bit in IOCF to "1".
Global interrupt is enabled by ENI instruction and is disabled by DISI instruction. Refer to Fig.10.
IOCF register is readable and writable.
TCC/WDT & Prescaler
There is an 8-bit counter available as prescaler for the TCC or WDT. The prescaler is available for the TCC only
or WDT only at the same time and the PAB bit of CONT register is used to determine the prescaler assignment.
The PSR0~PSR2 bits determine the prescale ratio. Fig. 5 depicts the circuit diagram of TCC/WDT.
R1(TCC) is an 8-bit timer/counter. The clock source of TCC can be internal clock or external clock input (edge
selectable from TCC pin). TCC will increase by 1 every instruction cycle (without prescaler). The prescaler
will be cleared by instructions which write to TCC each time, when assigned to TCC mode.
The watchdog timer is a free running on-chip RC oscillator. The WDT will keep running even the oscillator
driver has been turned off (i.e. in sleep mode). During the normal operation or the sleep mode, WDT time-out
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