參數(shù)資料
型號(hào): EMDS12C2H-97.6563M
廠商: ECLIPTEK CORP
元件分類: XO, clock
英文描述: CRYSTAL OSCILLATOR, CLOCK, 97.6563 MHz, LVDS OUTPUT
封裝: ROHS COMPLIANT, PLASTIC, SMD, 6 PIN
文件頁數(shù): 1/5頁
文件大?。?/td> 243K
代理商: EMDS12C2H-97.6563M
Pb
RoHS
EMDS12C2H-97.6563M
EMDS12 C 2 H -97.6563M
Series
RoHS Compliant (Pb-free) 2.5V 6 Pad 5mm x 7mm
Plastic SMD LVDS MEMS Oscillator
Frequency Tolerance/Stability
±100ppm Maximum over 0°C to +70°C
Duty Cycle
50 ±5(%)
Nominal Frequency
97.6563MHz
Logic Control / Additional Output
Output Enable (OE) and Complementary Output
ELECTRICAL SPECIFICATIONS
Nominal Frequency
97.6563MHz
Frequency Tolerance/Stability
±100ppm Maximum over 0°C to +70°C (Inclusive of all conditions: Calibration Tolerance at 25°C,
Frequency Stability over the Operating Temperature Range, Supply Voltage Change, Output Load Change,
1st Year Aging at 25°C, Reflow, Shock, and Vibration)
Aging at 25°C
±1ppm First Year Maximum
Supply Voltage
+2.5Vdc ±0.125Vdc
Input Current
75mA Maximum (Excluding Load Termination Current)
Output Voltage Logic High (Voh)
1.425Vdc Typical
Output Voltage Logic Low (Vol)
1.075Vdc Typical
Differential Output Voltage (Vod)
247mVdc Minimum, 350mVdc Typical, 454mVdc Maximum
Offset Voltage (Vos)
1.125V Minimum, 1.250V Typical, 1.375V Maximum
Rise/Fall Time
225pSec Typical, 325pSec Maximum (Measured over 20% to 80% of waveform)
Differential Output Error (dVod)
50mVdc Maximum
Duty Cycle
50 ±5(%) (Measured at 50% of waveform)
Offset Error (dVos)
50mVdc Maximum
Load Drive Capability
100 Ohms Between Output and Complementary Output
Output Logic Type
LVDS
Logic Control / Additional Output
Output Enable (OE) and Complementary Output
Output Control Input Voltage
Vih of 70% of Vcc Minimum or No Connect to Enable Output and Complementary Output, Vil of 30% of Vcc
Maximum to Disable Output and Complementary Output (High Impedance)
Output Enable Current
70mA Maximum (OE) Without Load
Period Jitter (Deterministic)
0.2pSec Typical
Period Jitter (Random)
2.0pSec Typical
Period Jitter (RMS)
2.5pSec Typical, 3.5pSec Maximum
Period Jitter (pk-pk)
25pSec Typical, 30pSec Maximum
RMS Phase Jitter (Fj = 637kHz to
10MHz; Random)
2.1pSec Typical
RMS Phase Jitter (Fj = 1MHz to
20MHz; Random)
1.7pSec Typical
RMS Phase Jitter (Fj = 1.875MHz to
20MHz; Random)
1.5pSec Typical
Start Up Time
10mSec Maximum
Storage Temperature Range
-55°C to +125°C
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
MIL-STD-883, Method 3015, Class 2, HBM 2000V
Flammability
UL94-V0
Mechanical Shock
MIL-STD-883, Method 2002, Condition G, 30,000G
Moisture Resistance
MIL-STD-883, Method 1004
Moisture Sensitivity Level
J-STD-020, MSL 1
Resistance to Soldering Heat
MIL-STD-202, Method 210, Condition K
Resistance to Solvents
MIL-STD-202, Method 215
Solderability
MIL-STD-883, Method 2003 (Six I/O Pads on bottom of package only)
Temperature Cycling
MIL-STD-883, Method 1010, Condition B
www.ecliptek.com | Specification Subject to Change Without Notice | Rev C 8/13/2010 | Page 1 of 5
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