- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄362706 > EN29LV800B90TP (Electronic Theatre Controls, Inc.) 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only PDF資料下載
參數(shù)資料
| 型號： | EN29LV800B90TP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only |
| 中文描述： | 8兆位（1024K × 8位/為512k × 16位）閃存引導(dǎo)扇區(qū)閃存，CMOS 3.0伏，只 |
| 文件頁數(shù)： | 15/43頁 |
| 文件大小： | 239K |
| 代理商： | EN29LV800B90TP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
EN29LV800
4800 Great America Parkway, Suite 202
Santa Clara, CA 95054
Tel: 408-235-8680
Fax: 408-235-8685
15
Rev 0.4 Release Date: 2002/01/29
During an embedded Program or Erase operation, successive attempts to read data from the device
at any address (by toggling
OE
or
CE
) will result in DQ6 toggling between “zero” and “one”. Once
the embedded Program or Erase operation is complete, DQ6 will stop toggling and valid data will be
read on the next successive attempts. During Byte Programming, the Toggle Bit is valid after the
rising edge of the fourth
WE
pulse in the four-cycle sequence. For Chip Erase, the Toggle Bit is valid
after the rising edge of the sixth-cycle sequence. For Sector Erase, the Toggle Bit is valid after the
last rising edge of the Sector Erase
W E
pulse.
In Byte Programming, if the sector being written to is protected, DQ6 will toggles for about 2
μ
s, then
stop toggling without the data in the sector having changed. In Sector Erase or Chip Erase, if all
selected blocks are protected, DQ6 will toggle for about 100
μ
s. The chip will then return to the read
mode without changing data in all protected blocks.
Toggling either
CE
or
OE
will cause DQ6 to toggle.
The flowchart for the Toggle Bit (DQ6) is shown in Flowchart 6. The Toggle Bit timing diagram is
shown in Figure 9
.
DQ5: Exceeded Timing Limits
DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit.
Under these conditions DQ5 produces a “1.” This is a failure condition that indicates the program or erase
cycle was not successfully completed. Since it is possible that DQ5 can become a 1 when the device has
successfully completed its operation and has returned to read mode, the user must check again to see if
the DQ6 is toggling after detecting a “1” on DQ5.
The DQ5 failure condition may appear if the system tries to program a “1” to a location that is previously
programmed to “0.”
Only an erase operation can change a “0” back to a “1.”
Under this condition, the
device halts the operation, and when the operation has exceeded the timing limits, DQ5 produces a “1.”
Under both these conditions, the system must issue the reset command to return the device to reading
array data.
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the output on DQ3 can be used to determine whether or
not an erase operation has begun. (The sector erase timer does not apply to the chip erase command.)
When sector erase starts, DQ3 switches from “0” to “1.” This device does not support multiple sector
erase command sequences so it is not very meaningful since it immediately shows as a “1” after the first
30h command. Future devices may support this feature.
DQ2: Erase Toggle Bit II
The “Toggle Bit” on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing
(that is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle
Bit II is valid after the rising edge of the final WE# pulse in the command sequence. DQ2 toggles when
the system reads at addresses within those sectors that have been selected for erasure. (The system may
use either OE# or CE# to control the read cycles.) But DQ2 cannot distinguish whether the sector is
actively erasing or is erase-suspended. DQ6, by comparison, indicates whether the device is actively
erasing, or is in Erase Suspend, but cannot distinguish which sectors are selected for erasure. Thus, both
status bits are required for sector and mode information. Refer to Table 5 to compare outputs for DQ2 and
DQ6.
Flowchart 6 shows the toggle bit algorithm, and the section “DQ2: Toggle Bit” explains the algorithm. See
also the “DQ6: Toggle Bit I” subsection. Refer to the Toggle Bit Timings figure for the toggle bit timing
diagram. The DQ2 vs. DQ6 figure shows the differences between DQ2 and DQ6 in graphical form.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EN29LV800T70RS | 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only |
| EN29LV800T70RSI | 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only |
| EN29LV800T70RSIP | 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only |
| EN29LV800T70RSP | 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only |
| EN29LV800T70RT | 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EN29LV800BB-70TCP | 制造商:EON SILICON SOLUTION INC 功能描述:EN29LV800B Series, 8 Mbit 70 NS 48 TSOP 3 V Bottom Boot Sector NOR Flash |
| EN29LV800CT-70TIP | 制造商:EON SILICON SOLUTION INC 功能描述:8mb TSOP 70ns nor flash |
| EN29SL400B-90BIP | 制造商:EON SILICON SOLUTION INC 功能描述:EN29SL400 Series, 4 Mbit 90 NS 48 FBGA 1.8 V Bottom Boot Sector NOR Flash |
| EN2-B1H1 | 制造商:NEC 制造商全稱:NEC 功能描述:AUTOMOTIVE RELAYS (Twin, Single) Relays |
| EN2-B1H1S | 制造商:NEC 制造商全稱:NEC 功能描述:AUTOMOTIVE RELAYS (Twin, Single) Relays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。