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參數資料
| 型號： | ENC28J60-I/SS |
| 廠商： | Microchip Technology |
| 文件頁數： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ETHERNET CTRLR W/SPI 28SSOP |
| 標準包裝： | 47 |
| 控制器類型： | 以太網控制器，MAC/10Base-T |
| 接口： | SPI |
| 電源電壓： | 3.1 V ~ 3.6 V |
| 電流 - 電源： | 160mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 28-SSOP |
| 包裝： | 管件 |
| 產品目錄頁面： | 684 (CN2011-ZH PDF) |
ENC28J60
DS80349C-page 6
2010 Microchip Technology Inc.
EXAMPLE 1:
14. Module: Memory (Ethernet Buffer)
The receive hardware may corrupt the circular
receive buffer (including the Next Packet Pointer
and receive status vector fields) when an even value
is programmed into the ERXRDPTH:ERXRDPTL
registers.
Work around
Ensure that only odd addresses are written to the
ERXRDPT registers. Assuming that ERXND con-
tains an odd value, many applications can derive a
suitable value to write to ERXRDPT by subtracting
one from the Next Packet Pointer (a value always
ensured to be even because of hardware padding)
and then compensating for a potential ERXST to
ERXND wrap-around. Assuming that the receive
buffer area does not span the 1FFFh to 0000h mem-
ory boundary, the logic in Example 2 will ensure that
ERXRDPT is programmed with an odd value:
EXAMPLE 2:
Affected Silicon Revisions
15. Module: Transmit Logic
If a collision occurs after 64 bytes have been
transmitted, the transmit logic may not set the Late
Collision Error status bit (ESTAT.LATECOL).
Work around
Whenever a late collision has potentially occurred
(both EIR.TXERIF and ESTAT.TXABRT bits will be
set), read the transmit status vector and check the
transmit late collision bit (bit 29).
Affected Silicon Revisions
ECON1.TXRST
= 1
ECON1.TXRST
= 0
EIR.TXERIF
= 0
EIR.TXIF
= 0
ECON1.TXRTS
= 1
while(EIR.TXIF = 0 and EIR.TXERIF = 0)
NOP
ECON1.TXRTS
= 0
read tsv
for retrycount = 0 to 15
if (EIR.TXERIF and tsv<Transmit Late Collision>) then
ECON1.TXRST
= 1
ECON1.TXRST
= 0
EIR.TXERIF
= 0
EIR.TXIF
= 0
ECON1.TXRTS
= 1
while(EIR.TXIF = 0 and EIR.TXERIF = 0)
NOP
ECON1.TXRTS
= 0
read tsv
else
exit for
end if
next retrycount
B1
B4
B5
B7
XX
X
if (Next Packet Pointer = ERXST)
then:
ERXRDPT = ERXND
else:
ERXRDPT = Next Packet Pointer – 1
B1
B4
B5
B7
XX
X
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參數描述 |
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| ENC28J60ML | 制造商:Microchip Technology Inc 功能描述: |
| ENC28J60T | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone Ethernet Controller with SPI Interface |
| ENC28J60T/ML | 功能描述:IC ETHERNET CTRLR W/SPI 28QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ENC28J60T/SO | 功能描述:以太網 IC 8 KB RAM MAC&PHY Ethernet Controller RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發(fā)器數量:2 數據速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| ENC28J60T/SS | 功能描述:以太網 IC 8 KB RAM MAC&PHY Ethernet Controller RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發(fā)器數量:2 數據速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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