參數(shù)資料
型號: EP1AGX35CF484I6
廠商: Altera
文件頁數(shù): 1/4頁
文件大?。?/td> 0K
描述: IC ARRIA GX FPGA 35K 484FBGA
產(chǎn)品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 60
系列: Arria GX
LAB/CLB數(shù): 1676
邏輯元件/單元數(shù): 33520
RAM 位總計: 1348416
輸入/輸出數(shù): 230
電源電壓: 1.15 V ~ 1.25 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-BGA
供應商設備封裝: 484-FBGA(23x23)
December 2009
Altera Corporation
Arria GX Device Handbook, Volume 1
1. Arria GX Device Family Overview
Introduction
The Arria GX family of devices combines 3.125 Gbps serial transceivers with reliable
packaging technology and a proven logic array. Arria GX devices include 4 to 12
high-speed transceiver channels, each incorporating clock data recovery (CDR)
technology and embedded SERDES circuitry designed to support PCI-Express,
Gigabit Ethernet, SDI, SerialLite II, XAUI, and Serial RapidIO protocols, along with
the ability to develop proprietary, serial-based IP using its Basic mode. The
transceivers build upon the success of the Stratix II GX family. The Arria GX FPGA
technology offers a 1.2-V logic array with the right level of performance and
dependability needed to support these mainstream protocols.
Features
The key features of Arria GX devices include:
Transceiver block features
High-speed serial transceiver channels with CDR support up to 3.125 Gbps.
Devices available with 4, 8, or 12 high-speed full-duplex serial transceiver
channels
Support for the following CDR-based bus standards—PCI Express, Gigabit
Ethernet, SDI, SerialLite II, XAUI, and Serial RapidIO, along with the ability to
develop proprietary, serial-based IP using its Basic mode
Individual transmitter and receiver channel power-down capability for
reduced power consumption during non-operation
1.2- and 1.5-V pseudo current mode logic (PCML) support on transmitter
output buffers
Receiver indicator for loss of signal (available only in PCI Express [PIPE]
mode)
Hot socketing feature for hot plug-in or hot swap and power sequencing
support without the use of external devices
Dedicated circuitry that is compliant with PIPE, XAUI, Gigabit Ethernet, Serial
Digital Interface (SDI), and Serial RapidIO
8B/10B encoder/decoder performs 8-bit to 10-bit encoding and 10-bit to 8-bit
decoding
Phase compensation FIFO buffer performs clock domain translation between
the transceiver block and the logic array
Channel aligner compliant with XAUI
AGX51001-2.0
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EP1AGX35CF484I6N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria GX 1676 LABs 230 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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