參數(shù)資料
型號(hào): EP1AGX60CF484I6N
廠商: Altera
文件頁數(shù): 4/4頁
文件大?。?/td> 0K
描述: IC ARRIA GX FPGA 60K 484FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 60
系列: Arria GX
LAB/CLB數(shù): 3005
邏輯元件/單元數(shù): 60100
RAM 位總計(jì): 2528640
輸入/輸出數(shù): 229
電源電壓: 1.15 V ~ 1.25 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FBGA(23x23)
配用: 544-2372-ND - KIT DEV ARRIA GX 1AGX60N
其它名稱: 544-2402
1–4
Chapter 1: Arria GX Device Family Overview
Document Revision History
Arria GX Device Handbook, Volume 1
December 2009
Altera Corporation
Table 1–3 lists the Arria GX device package sizes.
Document Revision History
Table 1–4 lists the revision history for this chapter.
EP1AGX60D
8
31
29
350
EP1AGX60E
12
42
514
EP1AGX90E
12
47
45
538
Table 1–2. Arria GX Package Options (Pin Counts and Transceiver Channels) (Part 2 of 2)
Device
Transceiver
Channels
Source-Synchronous Channels
Maximum User I/O Pin Count
Receive
Transmit
484-Pin FBGA
(23 mm)
780-Pin FBGA
(29 mm)
1152-Pin
FBGA
(35 mm)
Table 1–3. Arria GX FBGA Package Sizes
Dimension
484 Pins
780 Pins
1152 Pins
Pitch (mm)
1.00
Area (mm2)
529
841
1225
Length × width
(mm × mm)
23 × 23
29 × 29
35 × 35
Table 1–4. Document Revision History
Date and Document Version
Changes Made
Summary of Changes
December 2009, v2.0
Document template update.
Minor text edits.
May 2008, v1.2
Included support for SDI,
SerialLite II, and XAUI.
June 2007, v1.1
Included GIGE information.
May 2007, v1.0
Initial Release
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