參數(shù)資料
型號: EP20K160EQI208-3ES
英文描述: 5V, Byte Alterable EEPROM; Temperature Range: 0&degC to 70°C; Package: 32-CerDIP
中文描述: FPGA的
文件頁數(shù): 84/114頁
文件大?。?/td> 1623K
代理商: EP20K160EQI208-3ES
Altera Corporation
71
APEX 20K Programmable Logic Device Family Data Sheet
All specifications are always representative of worst-case supply voltage
and junction temperature conditions. All output-pin-timing specifications
are reported for maximum driver strength.
Figure 36 shows the fMAX timing model for APEX 20K devices.
Figure 36. APEX 20K fMAX Timing Model
Figure 37 shows the fMAX timing model for APEX 20KE devices. These
parameters can be used to estimate fMAX for multipule levels of logic.
Quartus II software timing analysis should be used for more accurate
timing information.
SU
H
CO
LUT
t
ESBRC
ESBWC
ESBWESU
ESBDATASU
ESBADDRSU
ESBDATACO1
ESBDATACO2
ESBDD
PD
PTERMSU
PTERMCO
t
F1—4
F5—20
F20+
LE
ESB
Routing Delay
相關(guān)PDF資料
PDF描述
EP20K160EQI240-1ES 5V, Byte Alterable EEPROM; Temperature Range: 0&degC to 70°C; Package: 32-CerDIP
EP20K160EQI240-2ES 5V, Byte Alterable EEPROM; Temperature Range: 0&degC to 70°C; Package: 32-CerDIP
EP20K160EQI240-3ES 5V, Byte Alterable EEPROM; Temperature Range: -55°C to 125°C; Package: 32-CerDIP
EP20K160ERC208-1ES FPGA
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K160EQI240-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K160EQI240-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K160EQI240-3ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K160ERC208-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K160ERC208-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA