APEXTM
參數(shù)資料
型號: EP20K30ETC144-3
廠商: Altera
文件頁數(shù): 74/117頁
文件大小: 0K
描述: IC APEX 20KE FPGA 30K 144-TQFP
產品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 60
系列: APEX-20K®
LAB/CLB數(shù): 120
邏輯元件/單元數(shù): 1200
RAM 位總計: 24576
輸入/輸出數(shù): 92
門數(shù): 113000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 144-LQFP
供應商設備封裝: 144-TQFP(20x20)
產品目錄頁面: 602 (CN2011-ZH PDF)
其它名稱: 544-1865
EP20K30ETC144-3-ND
6
Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
General
Description
APEXTM 20K devices are the first PLDs designed with the MultiCore
architecture, which combines the strengths of LUT-based and product-
term-based devices with an enhanced memory structure. LUT-based logic
provides optimized performance and efficiency for data-path, register-
intensive, mathematical, or digital signal processing (DSP) designs.
Product-term-based logic is optimized for complex combinatorial paths,
such as complex state machines. LUT- and product-term-based logic
combined with memory functions and a wide variety of MegaCore and
AMPP functions make the APEX 20K device architecture uniquely suited
for system-on-a-programmable-chip designs. Applications historically
requiring a combination of LUT-, product-term-, and memory-based
devices can now be integrated into one APEX 20K device.
APEX 20KE devices are a superset of APEX 20K devices and include
additional features such as advanced I/O standard support, CAM,
additional global clocks, and enhanced ClockLock clock circuitry. In
addition, APEX 20KE devices extend the APEX 20K family to 1.5 million
gates. APEX 20KE devices are denoted with an “E” suffix in the device
name (e.g., the EP20K1000E device is an APEX 20KE device). Table 8
compares the features included in APEX 20K and APEX 20KE devices.
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