參數(shù)資料
型號： EP2AGX125EF35C4N
廠商： Altera
文件頁數(shù)： 3/90頁
文件大?。?/td> 0K
描述： IC ARRIAII GX FPGA 125K 1152FBGA
產(chǎn)品培訓模塊： Three Reasons to Use FPGA's in Industrial Designs
標準包裝： 3
系列： Arria II GX
LAB/CLB數(shù)： 4964
邏輯元件/單元數(shù)： 118143
RAM 位總計： 8315904
輸入/輸出數(shù)： 452
電源電壓： 0.87 V ~ 0.93 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 1152-BBGA
供應商設備封裝： 1152-FBGA（27x27）
配用： 568-5095-ND - BOARD DEMO FOR ADC1413D125
其它名稱： 544-2697
Chapter 1: Device Datasheet for Arria II Devices
1–3
Electrical Characteristics
December 2013
Altera Corporation
Maximum Allowed Overshoot and Undershoot Voltage
During transitions, input signals may overshoot to the voltage shown in Table 1–3 and
undershoot to –2.0 V for magnitude of currents less than 100 mA and periods shorter
than 20 ns.
Table 1–3 lists the Arria II GX and GZ maximum allowed input overshoot voltage and
the duration of the overshoot voltage as a percentage over the device lifetime. The
maximum allowed overshoot duration is specified as a percentage of high-time over
the lifetime of the device. A DC signal is equivalent to 100% duty cycle. For example,
a signal that overshoots to 4.3 V can only be at 4.3 V for 5.41% over the lifetime of the
device; for a device lifetime of 10 years, this amounts to 5.41/10ths of a year.
VCCA_L
Supplies transceiver high voltage power (left side)
-0.5
3.75
V
VCCA_R
Supplies transceiver high voltage power (right side)
-0.5
3.75
V
VCCHIP_L
Supplies transceiver HIP digital power (left side)
-0.5
1.35
V
VCCR_L
Supplies receiver power (left side)
-0.5
1.35
V
VCCR_R
Supplies receiver power (right side)
-0.5
1.35
V
VCCT_L
Supplies transmitter power (left side)
-0.5
1.35
V
VCCT_R
Supplies transmitter power (right side)
-0.5
1.35
V
VCCL_GXBLn
Supplies power to the transceiver PMA TX, PMA RX, and clocking (left
side)
-0.5
1.35
V
VCCL_GXBRn
Supplies power to the transceiver PMA TX, PMA RX, and clocking (right
side)
-0.5
1.35
V
VCCH_GXBLn
Supplies power to the transceiver PMA output (TX) buffer (left side)
-0.5
1.8
V
VCCH_GXBRn
Supplies power to the transceiver PMA output (TX) buffer (right side)
-0.5
1.8
V
TJ
Operating junction temperature
-55
125
°C
TSTG
Storage temperature (no bias)
-65
150
°C
Note to Table 1–2:
(1) n = 0, 1, or 2.
Table 1–2. Absolute Maximum Ratings for Arria II GZ Devices (Part 2 of 2)
Symbol
Description
Minimum
Maximum
Unit
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相關代理商/技術參數(shù)
參數(shù)描述
EP2AGX125EF35C5 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 4964 LABs 452 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX125EF35C5N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 4964 LABs 452 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX125EF35C5NES 制造商:Altera Corporation 功能描述:FPGA Arria
EP2AGX125EF35C6 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 4964 LABs 452 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX125EF35C6ES 制造商:Altera Corporation 功能描述:FPGA Arria 制造商:Altera Corporation 功能描述:FPGA Arria? II GX Family 118143 Cells 400MHz 40nm Technology 0.9V 1152-Pin FC-FBGA
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