參數(shù)資料
型號: EP2AGX260FF35C5N
廠商: Altera
文件頁數(shù): 84/90頁
文件大小: 0K
描述: IC ARRIA II GX 260K 1152FBGA
產(chǎn)品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 3
系列: Arria II GX
LAB/CLB數(shù): 10260
邏輯元件/單元數(shù): 244188
RAM 位總計: 12038144
輸入/輸出數(shù): 612
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1152-BBGA
供應商設備封裝: 1152-FBGA(27x27)
Chapter 1: Device Datasheet for Arria II Devices
1–77
Document Revision History
December 2013
Altera Corporation
Document Revision History
Table 1–69 lists the revision history for this chapter.
U,
V
VCM(DC)
DC common mode input voltage.
VICM
Input common mode voltage: The common mode of the differential signal at the receiver.
VID
Input differential voltage swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
VDIF(AC)
AC differential input voltage: Minimum AC input differential voltage required for switching.
VDIF(DC)
DC differential input voltage: Minimum DC input differential voltage required for switching.
VIH
Voltage input high: The minimum positive voltage applied to the input which is accepted by the
device as a logic high.
VIH(AC)
High-level AC input voltage.
VIH(DC)
High-level DC input voltage.
VIL
Voltage input low: The maximum positive voltage applied to the input which is accepted by the
device as a logic low.
VIL(AC)
Low-level AC input voltage.
VIL(DC)
Low-level DC input voltage.
VOCM
Output common mode voltage: The common mode of the differential signal at the transmitter.
VOD
Output differential voltage swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter.
W,
X,
Y,
Z
W
High-speed I/O block: The clock boost factor.
Table 1–68. Glossary (Part 4 of 4)
Letter
Subject
Definitions
Table 1–69. Document Revision History (Part 1 of 2)
Date
Version
Changes
December 2013
4.4
July 2012
4.3
Updated the VCCH_GXBL/R operating conditions in Table 1–6.
Finalized Arria II GZ information in Table 1–20.
Added BLVDS specification in Table 1–32 and Table 1–33.
Updated input and output waveforms in Table 1–68.
December 2011
4.2
Updated Table 1–32, Table 1–33, Table 1–34, Table 1–35, Table 1–40, Table 1–41,
Table 1–54, and Table 1–67.
Minor text edits.
June 2011
4.1
Added Table 1–60.
Updated Table 1–32, Table 1–33, Table 1–38, Table 1–41, and Table 1–61.
Updated the “Switching Characteristics” section introduction.
Minor text edits.
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EP2AGX260FF35C6 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 10260 LABs 612 IO RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX260FF35C6N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 10260 LABs 612 IO RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX260FF35C6NES 制造商:Altera Corporation 功能描述:IC FPGA 612 I/O 1152FBGA 制造商:Altera Corporation 功能描述:IC ARRIA II GX FPGA 1152FBGA
EP2AGX260FF35I3 功能描述:IC ARRIA II GX 260K 1152FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Arria II GX 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA(34.55x34.55)
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