參數(shù)資料
型號: EP2AGX45CU17C5N
廠商: Altera
文件頁數(shù): 42/90頁
文件大小: 0K
描述: IC ARRIA II GX FPGA 45K 358UBGA
產(chǎn)品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 6
系列: Arria II GX
LAB/CLB數(shù): 1805
邏輯元件/單元數(shù): 42959
RAM 位總計: 3517440
輸入/輸出數(shù): 156
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 358-UBGA
供應商設(shè)備封裝: 358-UBGA
Chapter 1: Device Datasheet for Arria II Devices
1–39
Switching Characteristics
December 2013
Altera Corporation
PCIe Receiver Jitter Tolerance (4)
Total jitter at
2.5 Gbps (Gen1)
Compliance
pattern
> 0.6
UI
PCIe (Gen 1) Electrical Idle Detect Threshold (9)
VRX-IDLE-
DETDIFF (p-p)
Compliance
pattern
65
175
65
175
65
175
65
175
mV
Serial RapidIO (SRIO) Transmit Jitter Generation (5)
Deterministic
jitter
(peak-to-peak)
Data Rate = 1.25,
2.5, 3.125 Gbps
Pattern = CJPAT
0.17
0.17
0.17
0.17
UI
Total jitter
(peak-to-peak)
Data Rate = 1.25,
2.5, 3.125 Gbps
Pattern = CJPAT
0.35
0.35
0.35
0.35
UI
SRIO Receiver Jitter Tolerance (5)
Deterministic
jitter tolerance
(peak-to-peak)
Data Rate = 1.25,
2.5, 3.125 Gbps
Pattern = CJPAT
> 0.37
UI
Combined
deterministic and
random jitter
tolerance
(peak-to-peak)
Data Rate = 1.25,
2.5, 3.125 Gbps
Pattern = CJPAT
> 0.55
UI
Sinusoidal jitter
tolerance
(peak-to-peak)
Jitter frequency =
22.1 KHz
Data rate = 1.25,
2.5, 3.125 Gbps
Pattern = CJPAT
> 8.5
UI
Jitter frequency =
1.875 MHz
Data rate = 1.25,
2.5, 3.125 Gbps
Pattern = CJPAT
> 0.1
UI
Jitter frequency =
20 MHz
Data rate = 1.25,
2.5, 3.125 Gbps
Pattern = CJPAT
> 0.1
UI
GIGE Transmit Jitter Generation (6)
Deterministic
jitter
(peak-to-peak)
Pattern = CRPAT
0.14
0.14
0.14
0.14
UI
Table 1–40. Transceiver Block Jitter Specifications for Arria II GX Devices (Note 1) (Part 3 of 10)
Symbol/
Description
Conditions
I3
C4
C5, I5
C6
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
相關(guān)PDF資料
PDF描述
AGM43DRSH CONN EDGECARD 86POS DIP .156 SLD
AYM43DRSD CONN EDGECARD 86POS DIP .156 SLD
AGM43DRSD CONN EDGECARD 86POS DIP .156 SLD
HMC40DRYI-S734 CONN EDGECARD 80POS DIP .100 SLD
RSC60DRYN-S13 CONN EDGECARD 120POS .100 EXTEND
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP2AGX45CU17C6 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 1805 LABs 156 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX45CU17C6N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 1805 LABs 156 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX45CU17I3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 1805 LABs 156 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX45CU17I5 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 1805 LABs 156 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX45CU17I5N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 1805 LABs 156 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256