參數(shù)資料
型號: EP4CGX150DF31I7
廠商: Altera
文件頁數(shù): 23/42頁
文件大?。?/td> 0K
描述: IC CYCLONE IV FPGA 150K 896FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
Cyclone IV FPGA Family Overview
特色產(chǎn)品: Cyclone? IV FPGAs
標(biāo)準(zhǔn)包裝: 27
系列: CYCLONE® IV GX
LAB/CLB數(shù): 9360
邏輯元件/單元數(shù): 149760
RAM 位總計: 6635520
輸入/輸出數(shù): 475
電源電壓: 1.16 V ~ 1.24 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 896-BBGA
供應(yīng)商設(shè)備封裝: 896-FBGA(31x31)
Chapter 1: Cyclone IV Device Datasheet
1–3
Operating Conditions
December 2013
Altera Corporation
1 A DC signal is equivalent to 100% duty cycle. For example, a signal that overshoots to
4.3 V can only be at 4.3 V for 65% over the lifetime of the device; for a device lifetime
of 10 years, this amounts to 65/10ths of a year.
Figure 1–1 shows the methodology to determine the overshoot duration. The
overshoot voltage is shown in red and is present on the input pin of the Cyclone IV
device at over 4.3 V but below 4.4 V. From Table 1–2, for an overshoot of 4.3 V, the
percentage of high time for the overshoot can be as high as 65% over a 10-year period.
Percentage of high time is calculated as ([delta T]/T) × 100. This 10-year period
assumes that the device is always turned on with 100% I/O toggle rate and 50% duty
cycle signal. For lower I/O toggle rates and situations in which the device is in an idle
state, lifetimes are increased.
Table 1–2. Maximum Allowed Overshoot During Transitions over a 10
-Year Time Frame for
Cyclone IV Devices
Symbol
Parameter
Condition (V)
Overshoot Duration as % of High Time
Unit
Vi
AC Input
Voltage
VI = 4.20
100
%
VI = 4.25
98
%
VI = 4.30
65
%
VI = 4.35
43
%
VI = 4.40
29
%
VI = 4.45
20
%
VI = 4.50
13
%
VI = 4.55
9
%
VI = 4.60
6
%
Figure 1–1. Cyclone IV Devices Overshoot Duration
3.3 V
4.3 V
4.4 V
T
DT
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