<thead id="squn4"><noframes id="squn4">
<rt id="squn4"></rt>
<noscript id="squn4"><th id="squn4"></th></noscript>
<var id="squn4"><form id="squn4"><optgroup id="squn4"></optgroup></form></var>

    參數(shù)資料
    型號: EP4SE360F35I3N
    廠商: Altera
    文件頁數(shù): 7/82頁
    文件大小: 0K
    描述: IC STRATIX IV FPGA 360K 1152FBGA
    產(chǎn)品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
    標準包裝: 3
    系列: STRATIX® IV E
    LAB/CLB數(shù): 14144
    邏輯元件/單元數(shù): 353600
    RAM 位總計: 23105536
    輸入/輸出數(shù): 744
    電源電壓: 0.87 V ~ 0.93 V
    安裝類型: 表面貼裝
    工作溫度: -40°C ~ 100°C
    封裝/外殼: 1152-BBGA
    供應(yīng)商設(shè)備封裝: 1152-FBGA(27x27)
    Chapter 1: DC and Switching Characteristics for Stratix IV Devices
    1–7
    Electrical Characteristics
    March 2014
    Altera Corporation
    Stratix IV Device Handbook
    Volume 4: Device Datasheet and Addendum
    DC Characteristics
    This section lists the supply current, I/O pin leakage current, bus hold, on-chip
    termination (OCT) tolerance, input pin capacitance, and hot socketing specifications.
    Supply Current
    Standby current is the current drawn from the respective power rails used for power
    budgeting. Use the Excel-based Early Power Estimator (EPE) to get supply current
    estimates for your design because these currents vary greatly with the resources you
    use.
    f For more information about power estimation tools, refer to the PowerPlay Early Power
    Handbook.
    I/O Pin Leakage Current
    Table 1–9 lists the Stratix IV I/O pin leakage current specifications.
    VCCR_R
    Receiver power (right side)
    1.15
    1.2
    1.25
    V
    VCCT_L
    Transmitter power (left side)
    1.15
    1.2
    1.25
    V
    VCCT_R
    Transmitter power (right side)
    1.15
    1.2
    1.25
    V
    VCCL_GXBLn (3)
    Transceiver clock power (left side)
    1.15
    1.2
    1.25
    V
    VCCL_GXBRn (3)
    Transceiver clock power (right side)
    1.15
    1.2
    1.25
    V
    VCCH_GXBLn (3)
    Transmitter output buffer power (left side)
    1.33
    1.4
    1.47
    V
    VCCH_GXBRn (3)
    Transmitter output buffer power (right side)
    1.33
    1.4
    1.47
    V
    Notes to Table 1–8:
    (1) For the recommended operating conditions for Stratix IV GT engineering sample (ES1) devices, contact your local Altera sales representative.
    (2) Transceiver power supplies do not have power-on-reset circuitry. After initial power-up, violating the transceiver power supply operating
    conditions could lead to unpredictable link behavior.
    (3) n = 0, 1, 2, or 3.
    Table 1–8. Transceiver Power Supply Operating Conditions for Stratix IV GT Devices (Part 2 of 2) (1), (2)
    Symbol
    Description
    Minimum
    Typical
    Maximum
    Unit
    Table 1–9. I/O Pin Leakage Current for Stratix IV Devices (1)
    Symbol
    Description
    Conditions
    Min
    Typ
    Max
    Unit
    II
    Input pin
    VI = 0V to VCCIOMAX
    -20
    20
    A
    IOZ
    Tri-stated I/O pin
    VO = 0V to VCCIOMAX
    -20
    20
    A
    Note to Table 1–9:
    (1) VREF current refers to the input pin leakage current.
    相關(guān)PDF資料
    PDF描述
    EP4SE360F35C2N IC STRATIX IV FPGA 360K 1152FBGA
    AYM36DRMD-S664 CONN EDGECARD 72POS .156 WW
    EP4SE820H35C4N IC STRATIX IV FPGA 820K 1152HBGA
    ASM36DRMD-S664 CONN EDGECARD 72POS .156 WW
    AGM36DRMD-S664 CONN EDGECARD 72POS .156 WW
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    EP4SE360F35I4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV E 14144 LABs 744 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
    EP4SE360F35I4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV E 14144 LABs 744 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
    EP4SE360H29C2 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV E 14144 LABs 488 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
    EP4SE360H29C2N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV E 14144 LABs 488 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
    EP4SE360H29C3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV E 14144 LABs 488 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256