參數(shù)資料
型號: EP4SGX180FF35C3N
廠商: Altera
文件頁數(shù): 80/82頁
文件大小: 0K
描述: IC STRATIX IV GX 180K 1152FBGA
產(chǎn)品培訓模塊: Stratix IV FPGAs
Three Reasons to Use FPGA's in Industrial Designs
特色產(chǎn)品: Stratix? IV Series FPGAs
標準包裝: 3
系列: Stratix® IV GX
LAB/CLB數(shù): 7030
邏輯元件/單元數(shù): 175750
RAM 位總計: 13954048
輸入/輸出數(shù): 564
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1152-BBGA
供應商設備封裝: 1152-FBGA(27x27)
其它名稱: 544-2627
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Additional Information
This chapter provides additional information about the document and Altera.
About this Handbook
This handbook provides comprehensive information about the Altera Stratix IV
family of devices.
How to Contact Altera
To locate the most up-to-date information about Altera products, refer to the
following table.
Typographic Conventions
The following table shows the typographic conventions this document uses.
Contact (1)
Contact Method
Address
Technical support
Website
Technical training
Website
Email
Product literature
Website
Nontechnical support (general)
Email
(software licensing)
Email
Note to Table:
(1) You can also contact your local Altera sales office or sales representative.
Visual Cue
Meaning
Bold Type with Initial Capital
Letters
Indicate command names, dialog box titles, dialog box options, and other GUI
labels. For example, Save As dialog box. For GUI elements, capitalization matches
the GUI.
bold type
Indicates directory names, project names, disk drive names, file names, file name
extensions, software utility names, and GUI labels. For example, \qdesigns
directory, D: drive, and chiptrip.gdf file.
Italic Type with Initial Capital Letters
Indicate document titles. For example, Stratix IV Design Guidelines.
italic type
Indicates variables. For example, n + 1.
Variable names are enclosed in angle brackets (< >). For example, <file name> and
<project name>.pof file.
Initial Capital Letters
Indicate keyboard keys and menu names. For example, the Delete key and the
Options menu.
“Subheading Title”
Quotation marks indicate references to sections in a document and titles of
Quartus II Help topics. For example, “Typographic Conventions.”
相關PDF資料
PDF描述
RW2-4805D/B CONV DC/DC 2W 36-72VIN +/-05VOUT
EP4SGX110FF35C3N IC STRATIX IV GX 110K 1152FBGA
VI-21M-EU CONVERTER MOD DC/DC 10V 200W
KA79L15AZBU IC REG LDO -15V .1A TO-92
RAC05-05SB-E-ST CONV AC/DC 90-264VAC 5V 1A
相關代理商/技術參數(shù)
參數(shù)描述
EP4SGX180FF35C4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX180FF35C4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX180FF35I3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX180FF35I3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX180FF35I4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256