參數(shù)資料
型號: EP4SGX290FF35I4
廠商: Altera
文件頁數(shù): 39/82頁
文件大小: 0K
描述: IC STRATIX IV FPGA 290K 1152FBGA
產品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 3
系列: Stratix® IV GX
LAB/CLB數(shù): 11648
邏輯元件/單元數(shù): 291200
RAM 位總計: 17661952
輸入/輸出數(shù): 564
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 1152-BBGA
供應商設備封裝: 1152-FBGA(27x27)
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–36
Switching Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Table 1–30 lists the Stratix IV GX transceiver jitter specifications for all supported
protocols. For protocols supported by Stratix IV GT industrial speed grade devices,
refer to the Stratix IV GX –2 commercial speed grade column in Table 1–30.
Table 1–30. Transceiver Block Jitter Specifications for Stratix IV GX Devices (1), (2) (Part 1 of 9)
Symbol/
Description
Conditions
–2 Commercial
Speed Grade
–3 Commercial/
Industrial
and –2× Commercial
Speed Grade
–3 Military (3) and
–4 Commercial/
Industrial Speed
Grade
Unit
Min
Typ
Max
Min
Typ
Max
Min Typ
Max
SONET/SDH Transmit Jitter Generation (4)
Peak-to-peak jitter at
622.08 Mbps
Pattern = PRBS15
0.1
0.1
0.1
UI
RMS jitter at
622.08 Mbps
Pattern = PRBS15
0.01
0.01
0.01
UI
Peak-to-peak jitter at
2488.32 Mbps
Pattern = PRBS15
0.1
0.1
0.1
UI
RMS jitter at
2488.32 Mbps
Pattern = PRBS15
0.01
0.01
0.01
UI
SONET/SDH Receiver Jitter Tolerance (4)
Jitter tolerance at
622.08 Mbps
Jitter frequency =
0.03 KHz
Pattern = PRBS15
> 15
UI
Jitter frequency =
25 KHZ
Pattern = PRBS15
> 1.5
UI
Jitter frequency =
250 KHz
Pattern = PRBS15
> 0.15
UI
Jitter tolerance at
2488.32 Mbps
Jitter frequency =
0.06 KHz
Pattern = PRBS15
> 15
UI
Jitter frequency =
100 KHZ
Pattern = PRBS15
> 1.5
UI
Jitter frequency = 1 MHz
Pattern = PRBS15
> 0.15
UI
Jitter frequency =
10 MHz
Pattern = PRBS15
> 0.15
UI
Fibre Channel Transmit Jitter Generation (5), (13)
Total jitter FC-1
Pattern = CRPAT
0.23
0.23
0.23
UI
Deterministic jitter FC-1
Pattern = CRPAT
0.11
0.11
0.11
UI
Total jitter FC-2
Pattern = CRPAT
0.33
0.33
0.33
UI
Deterministic jitter FC-2
Pattern = CRPAT
0.2
0.2
0.2
UI
相關PDF資料
PDF描述
EP4SGX290FF35C3 IC STRATIX IV FPGA 290K 1152FBGA
FMC15DREN-S13 CONN EDGECARD 30POS .100 EXTEND
EP2S130F1508I4 IC STRATIX II FPGA 130K 1508FBGA
EP2S130F1508C3 IC STRATIX II FPGA 130K 1508FBGA
EP1S80F1020C6 IC STRATIX FPGA 80K LE 1020-FBGA
相關代理商/技術參數(shù)
參數(shù)描述
EP4SGX290FF35I4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 11648 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX290FH29C2X 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 11648 LABs 289 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX290FH29C2XN 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 11648 LABs 289 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX290FH29C3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 11648 LABs 289 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX290FH29C3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 11648 LABs 289 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256