參數(shù)資料
型號: EP4SGX360FF35C2X
廠商: Altera
文件頁數(shù): 40/82頁
文件大?。?/td> 0K
描述: IC STRATIX IV FPGA 360K 1152FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 3
系列: Stratix® IV GX
LAB/CLB數(shù): 14144
邏輯元件/單元數(shù): 353600
RAM 位總計(jì): 23105536
輸入/輸出數(shù): 564
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1152-BBGA
供應(yīng)商設(shè)備封裝: 1152-FBGA(27x27)
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–37
Switching Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Total jitter FC-4
Pattern = CRPAT
0.52
0.52
0.52
UI
Deterministic jitter FC-4
Pattern = CRPAT
0.33
0.33
0.33
UI
Fibre Channel Receiver Jitter Tolerance (5), (14)
Deterministic jitter FC-1
Pattern = CJTPAT
> 0.37
UI
Random jitter FC-1
Pattern = CJTPAT
> 0.31
UI
Sinusoidal jitter FC-1
Fc/25000
> 1.5
UI
Fc/1667
> 0.1
UI
Deterministic jitter FC-2
Pattern = CJTPAT
> 0.33
UI
Random jitter FC-2
Pattern = CJTPAT
> 0.29
UI
Sinusoidal jitter FC-2
Fc/25000
> 1.5
UI
Fc/1667
> 0.1
UI
Deterministic jitter FC-4
Pattern = CJTPAT
> 0.33
UI
Random jitter FC-4
Pattern = CJTPAT
> 0.29
UI
Sinusoidal jitter FC-4
Fc/25000
> 1.5
UI
Fc/1667
> 0.1
UI
XAUI Transmit Jitter Generation (6)
Total jitter at 3.125 Gbps
Pattern = CJPAT
0.3
0.3
0.3
UI
Deterministic jitter at
3.125 Gbps
Pattern = CJPAT
0.17
0.17
0.17
UI
XAUI Receiver Jitter Tolerance (6)
Total jitter
> 0.65
UI
Deterministic jitter
> 0.37
UI
Peak-to-peak jitter
Jitter frequency =
22.1 KHz
> 8.5
UI
Peak-to-peak jitter
Jitter frequency =
1.875 MHz
> 0.1
UI
Peak-to-peak jitter
Jitter frequency =
20 MHz
> 0.1
UI
PCIe Transmit Jitter Generation (7)
Total jitter at 2.5 Gbps
(Gen1)
Compliance pattern
0.25
0.25
0.25
UI
Total jitter at 5 Gbps
(Gen2) (15)
Compliance pattern
0.25
0.25
UI
PCIe Receiver Jitter Tolerance (7)
Total jitter at 2.5 Gbps
(Gen1)
Compliance pattern
> 0.6
UI
Table 1–30. Transceiver Block Jitter Specifications for Stratix IV GX Devices (1), (2) (Part 2 of 9)
Symbol/
Description
Conditions
–2 Commercial
Speed Grade
–3 Commercial/
Industrial
and –2× Commercial
Speed Grade
–3 Military (3) and
–4 Commercial/
Industrial Speed
Grade
Unit
Min
Typ
Max
Min
Typ
Max
Min Typ
Max
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參數(shù)描述
EP4SGX360FF35C2XN 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 14144 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX360FF35C3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 14144 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX360FF35C3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 14144 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX360FF35C4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 14144 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX360FF35C4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 14144 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256