參數(shù)資料
型號: EP4SGX360NF45I3
廠商: Altera
文件頁數(shù): 29/82頁
文件大?。?/td> 0K
描述: IC STRATIX IV FPGA 360K 1932FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 3
系列: Stratix® IV GX
LAB/CLB數(shù): 14144
邏輯元件/單元數(shù): 353600
RAM 位總計: 23105536
輸入/輸出數(shù): 920
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 1932-BBGA
供應(yīng)商設(shè)備封裝: 1932-FBGA(45x45)
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–27
Switching Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Data rate (Double
width,
non-PMA Direct) (16)
1000
11300
1000
-
10312.5 1000
8500
Mbps
Data rate (Single
width,
PMA Direct) (16)
600
-
3250
600
-
3250
600
3250
Mbps
Data rate (Double
width,
1000
-
6500
1000
-
6500
1000
6500
Mbps
Absolute VMAX for a
receiver pin (4)
1.6
1.6
1.6
V
Operational VMAX for
a receiver pin
1.5
1.5
1.5
V
Absolute VMIN for a
receiver pin
-0.4
-0.4
-0.4
V
Maximum
peak-to-peak
differential input
voltage VID (diff p-p)
before device
configuration
1.6
1.6
1.6
V
Maximum
peak-to-peak
differential input
voltage VID (diff p-p)
after device
configuration
VICM = 0.82 V
setting
——
2.7
2.7
2.7
V
VICM = 1.2 V
setting (5)
——
1.2
1.2
1.2
V
Minimum
differential eye
opening at the
receiver serial input
pins for data rates
10.3125 Gbps.
Equalization = 0
DC gain = 0 dB
85
85
85
mV
Minimum
differential eye
opening at the
receiver serial input
pins for data rates
> 10.3125 Gbps.
Equalization = 0
DC gain = 0 dB
165
mV
VICM
VICM = 0.82 V
setting
820 ± 10%
mV
VICM = 1.2 V
setting (5)
1200 ± 10%
mV
Table 1–24. Transceiver Specifications for Stratix IV GT Devices (Part 3 of 8)
Symbol/
Description
Conditions
–1 Industrial Speed
Grade
–2 Industrial Speed
Grade
–3 Industrial Speed
Grade
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
相關(guān)PDF資料
PDF描述
24LCS52-I/ST IC EEPROM 2KBIT 400KHZ 8TSSOP
24LC32A/SM IC EEPROM 32KBIT 400KHZ 8SOIC
24LC32AT/SM IC EEPROM 32KBIT 400KHZ 8SOIC
24LC32AT-I/SM IC EEPROM 32KBIT 400KHZ 8SOIC
24C02CT-E/ST IC EEPROM 2KBIT 400KHZ 8TSSOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP4SGX360NF45I3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 14144 LABs 920 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX360NF45I4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 14144 LABs 920 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX360NF45I4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 14144 LABs 920 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX530 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Stratix IV Device
EP4SGX530HH35C2 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 21248 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256