參數(shù)資料
型號(hào): EP4SGX70HF35I4
廠商: Altera
文件頁(yè)數(shù): 21/82頁(yè)
文件大?。?/td> 0K
描述: IC STRATIX IV FPGA 70K 1152FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 3
系列: Stratix® IV GX
LAB/CLB數(shù): 2904
邏輯元件/單元數(shù): 72600
RAM 位總計(jì): 7564880
輸入/輸出數(shù): 488
電源電壓: 0.87 V ~ 0.93 V
安裝類(lèi)型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 1152-BBGA
供應(yīng)商設(shè)備封裝: 1152-FBGA(27x27)
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–20
Switching Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Programmable DC
gain
DC Gain Setting
= 0
—0
0
0
dB
DC Gain Setting
= 1
—3
3
3
dB
DC Gain Setting
= 2
—6
6
6
dB
DC Gain Setting
= 3
—9
9
9
dB
DC Gain Setting
= 4
—12
12
12
dB
EyeQ Data Rate
600
3250
600
3250
600
3250
Mbps
AEQ Data Rate
min VID
(diff p-p)
outer envelope
= 600 mV
8B/10B
encoded data
2500
6500
2500
6500
Mbps
Decision Feedback
Equalizer (DFE) Data
Rate
min VID
(diff p-p)
outer envelope
= 500 mV
3125
6500
3125
6500
Mbps
Transmitter
Supported I/O
Standards
1.4 V PCML, 1.5 V PCML
Data rate (Single
width, non-PMA
Direct)
600
3750
600
3750
600
3750
Mbps
Data rate (Double
width, non-PMA
Direct)
1000
8500
1000
6500
1000
6375
Mbps
Data rate (Single
width, PMA Direct)
600
3250
600
3250
600
3250
Mbps
Data rate (Double
width, PMA Direct)
1000
6500
1000
6500
1000
6375
Mbps
VOCM
0.65 V setting
650
650
650
mV
Differential on-chip
termination
resistors
85
setting
85 ± 15%
100
setting
100 ± 15%
120
setting
120 ± 15%
150-
setting
150 ± 15%
Table 1–23. Transceiver Specifications for Stratix IV GX Devices (Part 5 of 9)
Symbol/
Description
Conditions
–2 Commercial
Speed Grade
–3 Commercial/
Industrial and
–2× Commercial
Speed Grade (1)
–3 Military (2)
and –4
Commercial/Industrial
Speed Grade
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
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