Copyright Cirrus Logic, Inc. 2011 (All Rights Reserved) 11 EP7311 High-Performance, Low-Power S" />
參數(shù)資料
型號: EP7311-CV-90
廠商: Cirrus Logic Inc
文件頁數(shù): 3/42頁
文件大?。?/td> 0K
描述: IC ARM720T MCU 90MHZ 208-LQFP
標準包裝: 36
系列: EP7
核心處理器: ARM7
芯體尺寸: 32-位
速度: 90MHz
連通性: 編解碼器,EBI/EMI,IrDA,鍵盤,多媒體編解碼器,SPI/Microwire1,UART/USART
外圍設備: LCD,LED,MaverickKey,PWM
輸入/輸出數(shù): 27
程序存儲器類型: ROMless
RAM 容量: 56K x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 2.7 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 208-LQFP
包裝: 托盤
其它名稱: 598-1225
DS506F2
Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
11
EP7311
High-Performance, Low-Power System on Chip
Pin Multiplexing
The following table shows the pin multiplexing of the MCP,
SSI2 and the CODEC. The selection between SSI2 and the
CODEC is controlled by the state of the SERSEL bit in
SYSCON2. The choice between the SSI2, CODEC, and the
MCP is controlled by the MCPSEL bit in SYSCON3 (see the
EP73xx User’s Manual for more information).
The following table shows the pins that have been multiplexed
in the EP7311.
Pin
Mnemonic
I/O
MCP
SSI2
CODEC
SSICLK
I/O
SIBCLK
SSICLK
PCMCLK
SSITXDA
O
SIBDOUT
SSITXDA
PCMOUT
SSIRXDA
I
SIBDIN
SSIRXDA
PCMIN
SSITXFR
I/O
SIBSYNC
SSITXFR
PCMSYNC
SSIRXFR
I
p/u
SSIRXFR
p/u
BUZ
O
Table R. MCP/SSI2/CODEC Pin Multiplexing
Signal
Block
Signal
Block
nMOE
Static Memory
nSDCAS
SDRAM
nMWE
Static Memory
nSDWE
SDRAM
WRITE
Static Memory
nSDRAS
SDRAM
A[27:15]
Static Memory
DRA[0:12]
SDRAM
A[14:13]
Static Memory
DRA[13:14]
SDRAM
PD[7:6]
GPIO
SDQM[1:0]
SDRAM
RUN
System
Configuration
CLKEN
System
Configuration
nMEDCHG
Interrupt
Controller
nBROM
Boot ROM
select
PD[0]
GPIO
LEDFLSH
LED Flasher
PE[1:0]
GPIO
BOOTSEL[1:0]
System
Configuration
PE[2]
GPIO
CLKSEL
System
Configuration
Table S. Pin Multiplexing
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