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參數(shù)資料
| 型號： | EP7312-IV-90 |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 53/54頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ARM720T MCU 90MHZ 208-LQFP |
| 標準包裝： | 36 |
| 系列： | EP7 |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 32-位 |
| 速度： | 90MHz |
| 連通性： | 編解碼器，DAI，EBI/EMI，IrDA，鍵盤，SPI/Microwire1，UART/USART |
| 外圍設(shè)備： | LCD，LED，MaverickKey，PWM |
| 輸入/輸出數(shù)： | 27 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 56K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.3 V ~ 2.7 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 208-LQFP |
| 包裝： | 托盤 |
| 配用： | 598-1209-ND - KIT DEVELOPMENT EP73XX ARM7 |
| 其它名稱： | 598-1246 |
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8
Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
DS508F2
EP7312
High-Performance, Low-Power System on Chip
CODEC Interface
The EP7312 includes an interface to telephony-type CODECs
for easy integration into voice-over-IP and other voice
communications
systems.
The
CODEC
interface
is
multiplexed to the same pins as the DAI and SSI2. Table 6
shows the CODEC Interface Pin Assignments.
Note:
See Table 18 on page 11 for information on pin
multiplexes.
SSI2 Interface
An
additional
SPI/Microwire1-compatible
interface
is
available for both master and slave mode communications. The
SSI2 unit shares the same pins as the DAI and CODEC
interfaces through a multiplexer. The SSI2 Interface has these
features:
Synchronous clock speeds of up to 512 kHz
Separate 16 entry TX and RX half-word wide FIFOs
Half empty/full interrupts for FIFOs
Separate RX and TX frame sync signals for asymmetric
traffic
Table 7 shows the SSI2 Interface pin assignments.
Note:
See Table 18 on page 11 for information on pin
multiplexes.
Synchronous Serial Interface
The EP7312 Synchronous Serial Interface has these features:
ADC (SSI) Interface: Master mode only; SPI and
Microwire1-compatible (128 kbps operation)
Selectable serial clock polarity
shows
the
Synchronous
Serial
Interface
pin
assignments.
LCD Controller
A DMA address generator is provided that fetches video
display data for the LCD controller from memory. The display
frame buffer start address is programmable, allowing the LCD
frame buffer to be in SDRAM, internal SRAM or external
SRAM. The LCD controller has these features:
Interfaces directly to a single-scan panel monochrome STN
LCD
Interfaces to a single-scan panel color STN LCD with
minimal external glue logic
Panel width size is programmable from 32 to 1024 pixels in
16-pixel increments
Video frame buffer size programmable up to
128 KB
Bits per pixel of 1, 2, or 4 bits
Table 9 shows the LCD Interface pin assignments.
64-Key Keypad Interface
Matrix keyboards and keypads can be easily read by the
EP7312. A dedicated 8-bit column driver output generates
Table 6. CODEC Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
PCMCLK
O
Serial bit clock
PCMOUT
O
Serial data out
PCMIN
I
Serial data in
PCMSYNC
O
Frame sync
Table 7. SSI2 Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
SSICLK
I/O
Serial bit clock
SSITXDA
O
Serial data out
SSIRXDA
I
Serial data in
SSITXFR
I/O
Transmit frame sync
SSIRXFR
I/O
Receive frame sync
Table 8. Serial Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
ADCLK
O
SSI1 ADC serial clock
ADCIN
I
SSI1 ADC serial input
ADCOUT
O
SSI1 ADC serial output
nADCCS
O
SSI1 ADC chip select
SMPCLK
O
SSI1 ADC sample clock
Table 9. LCD Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
CL1
O
LCD line clock
CL2
O
LCD pixel clock out
DD[3:0]
O
LCD serial display data bus
FRM
O
LCD frame synchronization pulse
M
O
LCD AC bias drive
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EP7312-IV-C | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7312-IVZ | 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic |
| EP7312M-CBZ | 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic |
| EP7312M-CVZ | 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic |
| EP7312M-CVZ-90 | 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic |
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