參數(shù)資料
型號: EPF10K10AQI208-3
廠商: Altera
文件頁數(shù): 118/128頁
文件大?。?/td> 0K
描述: IC FLEX 10KA FPGA 10K 208-PQFP
標準包裝: 24
系列: FLEX-10K®
LAB/CLB數(shù): 72
邏輯元件/單元數(shù): 576
RAM 位總計: 6144
輸入/輸出數(shù): 134
門數(shù): 31000
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 208-BFQFP
供應商設備封裝: 208-PQFP(28x28)
Altera Corporation
9
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Figure 1. FLEX 10K Device Block Diagram
FLEX 10K devices provide six dedicated inputs that drive the flipflops’
control inputs to ensure the efficient distribution of high-speed, low-skew
(less than 1.5 ns) control signals. These signals use dedicated routing
channels that provide shorter delays and lower skews than the FastTrack
Interconnect. Four of the dedicated inputs drive four global signals. These
four global signals can also be driven by internal logic, providing an ideal
solution for a clock divider or an internally generated asynchronous clear
signal that clears many registers in the device.
Embedded Array Block
The EAB is a flexible block of RAM with registers on the input and output
ports, and is used to implement common gate array megafunctions. The
EAB is also suitable for functions such as multipliers, vector scalars, and
error correction circuits, because it is large and flexible. These functions
can be combined in applications such as digital filters and
microcontrollers.
I/O Element
(IOE)
Logic Array
Block (LAB)
Row
Interconnect
IOE
Local Interconnect
IOE
Logic Element (LE)
Column
Interconnect
IOE
EAB
Logic
Array
IOE
Embedded Array Block (EAB)
Embedded Array
IOE
Logic Array
IOE
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