Notes to tables: (1) All timing parameters are described i" />
參數(shù)資料
型號： EPF10K20TC144-4N
廠商： Altera
文件頁數(shù)： 23/128頁
文件大小： 0K
描述： IC FLEX 10K FPGA 20K 144-TQFP
產(chǎn)品培訓模塊： Three Reasons to Use FPGA's in Industrial Designs
標準包裝： 60
系列： FLEX-10K®
LAB/CLB數(shù)： 144
邏輯元件/單元數(shù)： 1152
RAM 位總計： 12288
輸入/輸出數(shù)： 102
門數(shù)： 63000
電源電壓： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 144-LQFP
供應商設備封裝： 144-TQFP（20x20）
產(chǎn)品目錄頁面： 603 (CN2011-ZH PDF)
其它名稱： 544-2219
Altera Corporation
119
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
All timing parameters are described in Tables 32 through 37 in this data sheet.
(2)
Using an LE to register the signal may provide a lower setup time.
(3)
This parameter is specified by characterization.
ClockLock &
ClockBoost
Timing
Parameters
For the ClockLock and ClockBoost circuitry to function properly, the
incoming clock must meet certain requirements. If these specifications are
not met, the circuitry may not lock onto the incoming clock, which
generates an erroneous clock within the device. The clock generated by
the ClockLock and ClockBoost circuitry must also meet certain
specifications. If the incoming clock meets these requirements during
configuration, the ClockLock and ClockBoost circuitry will lock onto the
clock during configuration. The circuit will be ready for use immediately
after configuration. Figure 31 illustrates the incoming and generated clock
specifications.
Figure 31. Specifications for the Incoming & Generated Clocks
The tI parameter refers to the nominal input clock period; the tO parameter refers to the
nominal output clock period.
Table 113 summarizes the ClockLock and ClockBoost parameters.
tR
tF
tCLK1
tINDUTY
tI ± fCLKDEV
tI
tI ± tINCLKSTB
tOUTDUTY
tO
tO + tJITTER
tO – tJITTER
Input
Clock
ClockLock-
Generated
Clock
Table 113. ClockLock & ClockBoost Parameters
(Part 1 of 2)
Symbol
Parameter
Min
Typ
Max
Unit
tR
Input rise time
2ns
tF
Input fall time
2ns
tINDUTY
Input duty cycle
45
55
%
fCLK1
Input clock frequency (ClockBoost clock multiplication factor equals 1)
30
80
MHz
tCLK1
Input clock period (ClockBoost clock multiplication factor equals 1)
12.5
33.3
ns
fCLK2
Input clock frequency (ClockBoost clock multiplication factor equals 2)
16
50
MHz
tCLK2
Input clock period (ClockBoost clock multiplication factor equals 2)
20
62.5
ns
相關PDF資料
PDF描述
LT1768CGN#TRPBF IC CTRLR CCFL SGL/MULT HP 16SSOP
BAS21LT1G DIODE SWITCH 200MA 250V SOT23
ECM12DRYS CONN EDGECARD 24POS DIP .156 SLD
HMC36DREI-S734 CONN EDGECARD 72POS .100 EYELET
MIC4834YMM IC DVR DUAL FIXED EL FREQ 10MSOP
相關代理商/技術參數(shù)
參數(shù)描述
EPF10K20TI144-4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 144 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K20TI144-4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 144 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K250A 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Embedded Programmable Logic Device Family
EPF10K250ABC600-2 制造商:Rochester Electronics LLC 功能描述:- Bulk
EPF10K250AGC599-1 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Altera Corporation 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*