參數(shù)資料
型號(hào): EPF10K30EQC208-3N
廠商: Altera
文件頁(yè)數(shù): 28/100頁(yè)
文件大?。?/td> 0K
描述: IC FLEX 10KE FPGA 30K 208-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 72
系列: FLEX-10KE®
LAB/CLB數(shù): 216
邏輯元件/單元數(shù): 1728
RAM 位總計(jì): 24576
輸入/輸出數(shù): 147
門數(shù): 119000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
Altera Corporation
33
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
When dedicated inputs drive non-inverted and inverted peripheral clears,
clock enables, and output enables, two signals on the peripheral control
bus will be used.
Tables 8 and 9 list the sources for each peripheral control signal, and show
how the output enable, clock enable, clock, and clear signals share
12 peripheral control signals. The tables also show the rows that can drive
global signals.
Table 8. Peripheral Bus Sources for EPF10K30E, EPF10K50E & EPF10K50S Devices
Peripheral
Control Signal
EPF10K30E
EPF10K50E
EPF10K50S
OE0
Row A
OE1
Row B
OE2
Row C
Row D
OE3
Row D
Row F
OE4
Row E
Row H
OE5
Row F
Row J
CLKENA0/CLK0/GLOBAL0
Row A
CLKENA1/OE6/GLOBAL1
Row B
Row C
CLKENA2/CLR0
Row C
Row E
CLKENA3/OE7/GLOBAL2
Row D
Row G
CLKENA4/CLR1
Row E
Row I
CLKENA5/CLK1/GLOBAL3
Row F
Row J
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