- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19853 > EPM3064ATI100-10 (Altera)IC MAX 3000A CPLD 64 100-TQFP PDF資料下載
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
20
Altera Corporation
MAX 3000A Programmable Logic Device Family Data Sheet
Programmable
Speed/Power
Control
MAX 3000A devices offer a power–saving mode that supports low-power
operation across user–defined signal paths or the entire device. This
feature allows total power dissipation to be reduced by 50% or more
because most logic applications require only a small fraction of all gates to
operate at maximum frequency.
The designer can program each individual macrocell in a MAX 3000A
device for either high–speed or low–power operation. As a result,
speed-critical paths in the design can run at high speed, while the
remaining paths can operate at reduced power. Macrocells that run at low
power incur a nominal timing delay adder (tLPA) for the tLAD, tLAC, tIC,
t, tEN, tCPPW and tSEXP parameters.
Output
Configuration
MAX 3000A device outputs can be programmed to meet a variety of
system–level requirements.
MultiVolt I/O Interface
The MAX 3000A device architecture supports the MultiVolt I/O interface
feature, which allows MAX 3000A devices to connect to systems with
differing supply voltages. MAX 3000A devices in all packages can be set
for 2.5–V, 3.3–V, or 5.0–V I/O pin operation. These devices have one set of
VCC pins for internal operation and input buffers (VCCINT), and another
set for I/O output drivers (VCCIO).
The VCCIO pins can be connected to either a 3.3–V or 2.5–V power supply,
depending on the output requirements. When the VCCIO pins are
connected to a 2.5–V power supply, the output levels are compatible with
2.5–V systems. When the VCCIO pins are connected to a 3.3–V power
supply, the output high is at 3.3 V and is therefore compatible with 3.3-V
or 5.0–V systems. Devices operating with VCCIO levels lower than 3.0 V
incur a nominally greater timing delay of tOD2 instead of tOD1. Inputs can
always be driven by 2.5–V, 3.3–V, or 5.0–V signals.
Table 11 summarizes the MAX 3000A MultiVolt I/O support.
Note:
(1)
When VCCIO is 3.3 V, a MAX 3000A device can drive a 2.5–V device that has 3.3–V
tolerant inputs.
Table 11. MAX 3000A MultiVolt I/O Support
VCCIO Voltage
Input Signal (V)
Output Signal (V)
2.5
3.3
5.0
2.5
3.3
5.0
2.5
vvvv
3.3
vvvvvv
相關PDF資料 |
PDF描述 |
|---|---|
| MAX15006AATT/V+T | IC REG LDO 3.3V 50MA 6-TDFN |
| LTC1647-2CS8#TR | IC CONTROLLER HOTSWAP DUAL 8SOIC |
| MAX15007BASA+T | IC REG LDO 5V 50MA 8-SOIC |
| VE-2WZ-CY-F2 | CONVERTER MOD DC/DC 2V 20W |
| EBC22DRYN | CONN EDGECARD 44POS DIP .100 SLD |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EPM3064ATI100-10N | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 3000A 64 Macro 66 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| EPM3064ATI44-10 | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 3000A 64 Macro 34 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| EPM3064ATI44-10N | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 3000A 64 Macro 34 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| EPM3128A | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family |
| EPM3128AFC256-10 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Altera Corporation 功能描述:IC CPLD 128MC 10NS 256FBGA 制造商:Altera Corporation 功能描述:IC MAX 256FBGA |
發(fā)布緊急采購，3分鐘左右您將得到回復。