參數(shù)資料
型號: EPM7128ALC84-7
文件頁數(shù): 22/60頁
文件大小: 1030K
代理商: EPM7128ALC84-7
Altera Corporation
29
MAX 7000A Programmable Logic Device Data Sheet
Figure 12. MAX 7000A Switching Waveforms
Combinatorial Mode
Input Pin
I/O Pin
PIA Delay
Shared Expander
Delay
Logic Array
Input
Parallel Expander
Delay
Logic Array
Output
Output Pin
tIN
tLAC , tLAD
tPIA
tOD
tPEXP
tIO
tSEXP
tCOMB
Global Clock Mode
Global
Clock Pin
Global Clock
at Register
Data or Enable
(Logic Array Output)
tF
tCH
tCL
tR
tIN
tGLOB
tSU
tH
Array Clock Mode
Input or I/O Pin
Clock into PIA
Clock into
Logic Array
Clock at
Register
Data from
Logic Array
Register to PIA
to Logic Array
Register Output
to Pin
tF
tR
tACH
tACL
tSU
tIN
tIO
tRD
tPIA
tCLR , tPRE
tH
tPIA
tIC
tPIA
tOD
tR & tF < 2 ns. Inputs are
driven at 3 V for a logic
high and 0 V for a logic
low. All timing
characteristics are
measured at 1.5 V.
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