Notes to tables: (1) See the Operating Requirements for Altera Devices " />
參數(shù)資料
型號: EPM7256AEFI256-7
廠商: Altera
文件頁數(shù): 24/64頁
文件大?。?/td> 0K
描述: IC MAX 7000 CPLD 256 256-FBGA
標(biāo)準(zhǔn)包裝: 90
系列: MAX® 7000A
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 256
門數(shù): 5000
輸入/輸出數(shù): 164
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-FBGA(17x17)
包裝: 托盤
產(chǎn)品目錄頁面: 604 (CN2011-ZH PDF)
其它名稱: 544-2348
30
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents
less than 100 mA and periods shorter than 20 ns.
(3)
For EPM7128A and EPM7256A devices only, VCC must rise monotonically.
(4)
In MAX 7000AE devices, all pins, including dedicated inputs, I/O pins, and JTAG pins, may be driven before
VCCINT and VCCIO are powered.
(5)
These devices support in-system programming for –40° to 100° C. For in-system programming support between
–40° and 0° C, contact Altera Applications.
(6)
These values are specified under the recommended operating conditions shown in Table 14 on page 28.
(7)
The parameter is measured with 50% of the outputs each sourcing the specified current. The IOH parameter refers
to high-level TTL or CMOS output current.
(8)
The parameter is measured with 50% of the outputs each sinking the specified current. The IOL parameter refers to
low-level TTL or CMOS output current.
(9)
This value is specified for normal device operation. For MAX 7000AE devices, the maximum leakage current during
power-up is ±300 A. For EPM7128A and EPM7256A devices, leakage current during power-up is not specified.
(10) For EPM7128A and EPM7256A devices, this pull-up exists while a device is programmed in-system.
(11) For MAX 7000AE devices, this pull-up exists while devices are programmed in-system and in unprogrammed
devices during power-up.
(12) Capacitance is measured at 25 °C and is sample-tested only. The OE1 pin (high-voltage pin during programming)
has a maximum capacitance of 20 pF.
(13) The POR time for MAX 7000AE devices (except MAX 7128A and MAX 7256A devices) does not exceed 100 s. The
sufficient VCCINT voltage level for POR is 3.0 V. The device is fully initialized within the POR time after VCCINT
reaches the sufficient POR voltage level.
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EPM7256AEFI256-7N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 256 Macro 164 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7256AEQC208-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 256 Macro 164 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7256AEQC208-10N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 256 Macro 164 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7256AEQC208-5 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 256 Macro 164 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7256AEQC208-5N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 256 Macro 164 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100