參數(shù)資料
型號: EPM7512AETC144-7
廠商: Altera
文件頁數(shù): 63/64頁
文件大小: 0K
描述: IC MAX 7000 CPLD 512 144-TQFP
標準包裝: 180
系列: MAX® 7000A
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 32
宏單元數(shù): 512
門數(shù): 10000
輸入/輸出數(shù): 120
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應商設備封裝: 144-TQFP(20x20)
包裝: 托盤
其它名稱: 544-2360
8
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
Macrocells
MAX 7000A macrocells can be individually configured for either
sequential or combinatorial logic operation. The macrocells consist of
three functional blocks: the logic array, the product-term select matrix,
and the programmable register. Figure 2 shows a MAX 7000A macrocell.
Figure 2. MAX 7000A Macrocell
Combinatorial logic is implemented in the logic array, which provides
five product terms per macrocell. The product-term select matrix allocates
these product terms for use as either primary logic inputs (to the OR and
XOR
gates) to implement combinatorial functions, or as secondary inputs
to the macrocell’s register preset, clock, and clock enable control
functions.
Two kinds of expander product terms (“expanders”) are available to
supplement macrocell logic resources:
Shareable expanders, which are inverted product terms that are fed
back into the logic array
Parallel expanders, which are product terms borrowed from adjacent
macrocells
The Altera development system automatically optimizes product-term
allocation according to the logic requirements of the design.
Product-
Term
Select
Matrix
36 Signals
from PIA
16 Expander
Product Terms
LAB Local Array
Parallel Logic
Expanders
(from other
macrocells)
Shared Logic
Expanders
Clear
Select
Global
Clear
Global
Clocks
Clock/
Enable
Select
2
PRN
CLRN
D/T
Q
ENA
Register
Bypass
To I/O
Control
Block
From
I/O pin
To PIA
Programmable
Register
Fast Input
Select
VCC
相關PDF資料
PDF描述
VI-B1Y-CW-F1 CONVERTER MOD DC/DC 3.3V 66W
EBM06DSUN CONN EDGECARD 12POS DIP .156 SLD
EPM9560ARC208-10 IC MAX 9000 CPLD 560 208-RQFP
TAP156M016CRS CAP TANT 15UF 16V 20% RADIAL
TPSC106K016S0500 CAP TANT 10UF 16V 10% 2312
相關代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7512AETC144-7N 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 36 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512AETI100-7 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX
EPM7512B 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device
EPM7512BBC256-10 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512BBC256-5 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100