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| 鍨嬭櫉锛� | EVAL-AD5391EBZ |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 2/44闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | BOARD EVALUATION FOR AD5391 |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | DAC Architectures |
| 妯欐簴鍖呰锛� | 1 |
| DAC 鐨勬暩(sh霉)閲忥細 | 16 |
| 浣嶆暩(sh霉)锛� | 12 |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 167k |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | 涓茶 |
| 瑷�(sh猫)缃檪闁擄細 | 6µs |
| DAC 鍨嬶細 | 闆诲 |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 宸蹭緵鐗╁搧锛� | 鏉�锛孋D |
| 宸茬敤 IC / 闆朵欢锛� | AD5391 |
| 鐩搁棞(gu膩n)鐢�(ch菐n)鍝侊細 | AD5391BSTZ-5-ND - IC DAC 12BIT 16CHAN 3V 52LQFP AD5391BSTZ-3-ND - IC DAC 12BIT 16CHAN 3V 52LQFP AD5391BCPZ-5-REEL7-ND - IC DAC 12BIT 16CHAN 5V 64LFCSP AD5391BCPZ-5-REEL-ND - IC DAC 12BIT 16CHAN 5V 64-LFCSP AD5391BCPZ-3-ND - IC DAC 12BIT I2C 16CH 3V 64LFCSP AD5391BCPZ-5-ND - IC DAC 12BIT 16CH 5V 64-LFCSP |
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AD5390/AD5391/AD5392
Data Sheet
Rev. E | Page 10 of 44
AD5390-3/AD5391-3/AD5392-3 AC CHARACTERISTICS
AVDD = 2.7 V to 3.6 V; DVDD = 2.7 V to 5.5 V; AGND = DGND = 0 V; CL = 200 pF to AGND.
Table 5.
Parameter
All1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
Output Voltage Settling Time
scale to scale change settling to 卤1 LSB
AD5390/AD5392
3
s typ
Boost mode off, CR11 = 0
8
s max
Boost mode off, CR11 = 0
AD5391
3
s typ
Boost mode off, CR11 = 0
8
s max
Boost mode on, CR11 = 1
Slew Rate2
2.5
V/s typ
Boost mode on
1.5
V/s typ
Boost mode off, CR11 = 0
Digital-to-Analog Glitch Energy
12
nV-s typ
Glitch Impulse Peak Amplitude
15
mV typ
Channel-to-Channel Isolation
100
dB typ
See the Terminology section
DAC-to-DAC Crosstalk
1
nV-s typ
See the Terminology section
Digital Crosstalk
0.8
nV-s typ
Digital Feedthrough
0.1
nV-s typ
Effect of input bus activity on DAC output under test
OUTPUT NOISE (0.1 Hz to 10 Hz)
15
V p-p typ
External reference midscale loaded to DAC
40
V p-p typ
Internal reference midscale loaded to DAC
Output Noise Spectral Density
@ 1 kHz
150
nV/(Hz)1/2 typ
@ 10 kHz
100
nV/(Hz)1/2 typ
1
Guaranteed by design and characterization, not production tested.
2
The slew rate can be programmed via the current boost control bit in the AD539x control registers.
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