參數(shù)資料
型號(hào)： EVAL-AD5422EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 25/44頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD5422
標(biāo)準(zhǔn)包裝： 1
DAC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 1M
數(shù)據(jù)接口： 串行
設(shè)置時(shí)間： 32µs
DAC 型： 電流/電壓
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD5422
Data Sheet
AD5412/AD5422
Rev. I | Page 31 of 44
DATA REGISTER
The data register is addressed by setting the address word of the input shift register to 0x01. The data to be written to the data register is
entered in the D15 to D4 positions for the AD5412 and the D15 to D0 positions for the AD5422, as shown in Table 12 and Table 13.
Table 12. Programming the AD5412 Data Register
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
12-bit data-word
X
Table 13. Programming the AD5422 Data Register
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
16-bit data-word
CONTROL REGISTER
The control register is addressed by setting the address word of the input shift register to 0x55. The data to be written to the control
register is entered in the D15 to D0 positions, as shown in Table 14. The control register functions are shown in Table 15.
Table 14. Programming the Control Register
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
CLRSEL
OVRRNG
REXT
OUTEN
SR clock
SR step
SREN
DCEN
R2
R1
R0
Table 15. Control Register Functions
Option
Description
CLRSEL
See Table 21 for a description of the CLRSEL operation.
OVRRNG
Setting this bit increases the voltage output range by 10% (see the AD5412/AD5422 Features section).
REXT
Setting this bit selects the external current setting resistor (see the AD5412/AD5422 Features section). When
using an external current setting resistor, it is recommended to only set REXT when also setting the OUTEN
bit. Alternately, REXT can be set before the OUTEN bit is set, but the range (see Table 16) must be changed
on the write in which the output is enabled. See Figure 69 for best practice.
OUTEN
Output enable. This bit must be set to enable the outputs. The range bits select which output is functional.
SR clock
Digital slew rate control (see the AD5412/AD5422 Features section).
SR step
Digital slew rate control (see the AD5412/AD5422 Features section).
SREN
Digital slew rate control enable.
DCEN
Daisy chain enable.
R2, R1, R0
Output range select (see Table 16).
Table 16. Output Range Options
R2
R1
R0
Output Range Selected
0
0 V to 5 V voltage range
0
1
0 V to 10 V voltage range
0
1
0
±5 V voltage range
0
1
±10 V voltage range
1
0
1
4 mA to 20 mA current range
1
0
0 mA to 20 mA current range
1
0 mA to 24 mA current range
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EVAL-AD5424EBZ 功能描述:BOARD EVALUATION FOR AD5424 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
EVAL-AD5425EB 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk
EVAL-AD5425EBZ 功能描述:BOARD EVALUATION FOR AD5425 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
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